• Title/Summary/Keyword: SiC Paper

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FEA Study on Hoop Stress of Multilayered SiC Composite Tube for Nuclear Fuel Cladding (핵연료 피복관용 다중층 SiC 복합체 튜브의 Hoop Stress 전산모사 연구)

  • Lee, Hyeon-Geun;Kim, Daejong;Park, Ji Yeon;Kim, Weon-Ju
    • Journal of the Korean Ceramic Society
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    • v.51 no.5
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    • pp.435-441
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    • 2014
  • Silicon carbide-based ceramics and their composites have been studied for application to fusion and advanced fission energy systems. For fission reactors, $SiC_f$/SiC composites can be applied to core structural materials. Multilayered SiC composite fuel cladding, owing to its superior high temperature strength and low hydrogen generation under severe accident conditions, is a candidate for the replacement of zirconium alloy cladding. The SiC composite cladding has to retain its mechanical properties and original structure under the inner pressure caused by fission products; as such it can be applied as a cladding in fission reactor. A hoop strength test using an expandable polyurethane plug was designed in order to evaluate the mechanical properties of the fuel cladding. In this paper, a hoop strength test of the multilayered SiC composite tube for nuclear fuel cladding was simulated using FEA. The stress caused by the plug was distributed nonuniformly because of the friction coefficient difference between the inner surface of the tube and the plug. Hoop stress and shear stress at the tube was evaluated and the relationship between the concentrated stress at the inner layer of the tube and the fracture behavior of the tube was investigated.

4H-SiC Trench-type Accumulation Super Barrier Rectifier(TASBR) for Low Forward Voltage drop (낮은 순방향 전압 강하를 갖는 4H-SiC Trench-type Accumulation Super Barrier Rectifier(TASBR))

  • Bae, Dong-woo;kim, Kwang-soo
    • Journal of IKEEE
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    • v.21 no.1
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    • pp.73-76
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    • 2017
  • SiC devices have drawn much attentions for its wide band gap material properties. Especially 4H-SiC Schottky barrier diode is widely used for its rapid switching speed and low forward voltage drop. However, the low reliability of Schottky barrier diode has many problems that Super Barrier Rectifier(SBR) was researched for alternative. makes 4H-SiC trench-type accumulation super barrier rectifier(TASBR) is analyzed and proposed in this paper. We could verified that forward voltage drop was improved 21.06% without severe degradation of reverse breakdown voltage and leakage current based on the results from 2-D numerical simulations. With this novel rectifier structure, we can expect application with less power loss.

INTERNATIONAL COLLABORATION FOR SILICON CARBIDE MIRROR POLISHING AND DEVELOPMENT

  • HAN, JEONG-YEOL;CHO, MYUNG;POCZULP, GARY;NAH, JAKYUNG;SEO, HYUN-JOO;KIM, KYUNG-HWAN;TAHK, KYUNG-MO;KIM, DONG-KYUN;KIM, JINHO;SEO, MINHO;LEE, JONGGUN;HAN, SUNG-YEOP
    • Publications of The Korean Astronomical Society
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    • v.30 no.2
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    • pp.687-690
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    • 2015
  • For research and development of Silicon Carbide (SiC) mirrors, the Korea Astronomy and Space Science Institute (KASI) and National Optical Astronomy Observatory (NOAO) have agreed to cooperate and share on polishing and measuring facilities, experience and human resources for two years (2014-2015). The main goals of the SiC mirror polishing are to achieve optical surface figures of less than 20 nm rms and optical surface roughness of less than 2 nm rms. In addition, Green Optics Co., Ltd (GO) has been interested in the SiC polishing and joined the partnership with KASI. KASI will be involved in the development of the SiC polishing and the optical surface measurement using three different kinds of SiC materials and manufacturing processes (POCO$^{TM}$, CoorsTek$^{TM}$ and SSG$^{TM}$ corporations) provided by NOAO. GO will polish the SiC substrate within requirements. Additionally, the requirements of the optical surface imperfections are given as: less than 40 um scratch and 500 um dig. In this paper, we introduce the international collaboration and interim results for SiC mirror polishing and development.

Fabrication of SiCN microstructures for super-high temperature MEMS using photopolymerization and its characteristics (광중합에 의한 초고온 MEMS용 SiCN 미세구조물 제작과 그 특성)

  • Chung, Gwiy-Sang
    • Journal of Sensor Science and Technology
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    • v.15 no.2
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    • pp.148-152
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    • 2006
  • This paper describes the fabrication of SiCN microstructures for super-high temperature MEMS using photopolymerization of pre-ceramic polymer. In this work, polysilazane liquide as a precursor was deposited on Si wafers by spin coating, microstructured and solidificated by UV lithography, and removed from the substrate. The resulting solid polymer microstructures were cross-linked under HIP process and pyrolyzed to form a ceramic of withstanding over $1400^{\circ}C$. Finally, the fabricated SiCN microstructures were annealed at $1400^{\circ}C$ in a nitrogen atmosphere. Mechanical characteristics of the SiCN microstructure with different fabrication process conditions were evaluated. The elastic modules, hardness and tensile strength of the SiC microstructure implemented under optimum process condtions are 94.5 GPa, 10.5 GPa and 11.7 N/min, respectively. Consequently, the SiCN microstructure proposed in this work is very suitable for super-high temperature MEMS application due to very simple fabrication process and the potential possiblity of sophisticated mulitlayer or 3D microstructures as well as its good mechanical properties.

Fabrication of SiCN Microstructures for Super-High Temperature MEMS and Its Characteristics (초고온 MEMS용 SiCN 미세구조물 제작과 그 특성)

  • Lee, Gyu-Chul;Chung, Gwiy-Sang
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.392-393
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    • 2006
  • This paper describes the fabrication of SiCN microstructures for super-high temperature MEMS using photopolymerization of pre-ceramic polymer. In this work. polysilazane liquide as a precursor was deposited on Si wafers by spin coating. microstructured and solidificated by UV lithography. and removed from the substrate. The resulting solid polymer microstructures were cross-linked under HIP process and pyrolyzed to form a ceramic of withstanding over $1400^{\circ}C$. Finally, the fabricated SiCN microstructures were annealed at $1400^{\circ}C$ in a nitrogen atmosphere. Mechanical characteristics of the SiCN microstructure with different fabrication process conditions were evaluated. The elastic modules. hardness and tensile strength of the SiC microstructure implemented under optimum process conditions are 94.5 GPa, 10.5 GPa and 11.7 N/min, respectively. Consequently, the SiCN microstructure proposed in this work is very suitable for super-high temperature MEMS application due to very simple fabrication process and the potential possiblity of sophisticated multlayer or 3D microstructures as well as its good mechanical properties.

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The Analysis of the Breakdown Voltage according to the Change of JTE Structures and Design Parameters of 4H-SiC Devices (4H-SiC 소자의 JTE 구조 및 설계 조건 변화에 따른 항복전압 분석)

  • Koo, Yoon-Mo;Cho, Doo-Hyung;Kim, Kwang-Soo
    • Journal of IKEEE
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    • v.19 no.4
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    • pp.491-499
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    • 2015
  • Silicon Carbide(SiC) has large advantage in high temperature and high voltage applications because of its high thermal conductivity and large band gap energy. When using SiC to design power semiconductor devices, edge termination techniques have to be adjusted for its maximum breakdown voltage characteristics. Many edge termination techniques have been proposed, and the most appropriate technique for SiC device is Junction Termination Extension(JTE). In this paper, the change of breakdown voltage efficiency ratio according to the change of doping concentration and passivation oxide charge of each JTE techniques is demonstrated. As a result, the maximum breakdown voltage ratio of Single Zone JTE(SZ-JTE), Double Zone JTE(DZ-JTE), Multiple Floating Zone JTE(MFZ-JTE), and Space Modulated JTE(SM-JTE) is 98.24%, 99.02%, 98.98%, 99.22% each. MFZ-JTE has the smallest and SZ-JTE has the largest sensitivity of breakdown voltage ratios according to the change of JTE doping concentration. Additionally the degradation of breakdown voltage due to the passivation oxide charge is analyzed, and the sensitivity is largest in SZ-JTE and smallest in MFZ-JTE, too. In this paper, DZ-JTE and SM-JTE is the best efficiency JTE techniques than MFZ-JTE which needs large doping concentration in short JTE width.

Anodic bonding Characteristics of MLCA to Si-wafer Using Evaporated Pyrex #7740 Glass Thin-Films for MEMS Applications (파이렉스 #7740 유리박막을 이용한 MEMS용 MLCA와 Si기판의 양극접합 특성)

  • Chung, Gwiy-Sang;Kim, Jae-Min;Yoon, Suk-Jin
    • Journal of Sensor Science and Technology
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    • v.12 no.6
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    • pp.265-272
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    • 2003
  • This paper describes anodic bonding characteristics of MLCA (Multi Layer Ceramic Actuator) to Si-wafer using evaporated Pyrex #7740 glass thin-films for MEMS applications. Pyrex #7740 glass thin-films with same properties were deposited on MLCA under optimum RF magneto conditions(Ar 100%, input power $1\;W/cm^2$). After annealing in $450^{\circ}C$ for 1 hr, the anodic bonding of MLCA and Si-wafer was successfully performed at 600 V, $400^{\circ}C$ in - 760 mmHg. Then, the MLCA/Si bonded interface and fabricated Si diaphragm deflection characteristics were analyzed through the actuation test. It is possible to control with accurate deflection of Si diaphragm according to its geometries and its maximum non-linearity is 0.05-0.08 %FS. Moreover, any damages or separation of MLCA/Si bonded interfaces do not occur during actuation test. Therefore, it is expected that anodic bonding technology of MLCA/Si wafers could be usefully applied for the fabrication process of high-performance piezoelectric MEMS devices.

Impact behavior of including the boundary between A356/SiCw and Al alloy (Al alloy와의 경계면을 포함한 A356/SiCw의 충격거동)

  • 조종인;남현욱;한경섭
    • Proceedings of the Korean Society For Composite Materials Conference
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    • 2002.05a
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    • pp.97-100
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    • 2002
  • In this research, the impact behavior of the boundary between MMC-reinforced SiC whisker and Al alloy were studied. It is known that the resultant of the interfacial reaction between SiC whisker and Al alloy has brittle and low toughness property. In this paper, impact behavior of graded MMC & Al alloy shows the interfacial opening at the boundary. Generally this phenomenon is generated by thermal residual stress, brittle interfacial reaction resultant and difference of the deflection. So, these results may be interpreted as a macroscopic method of measuring the interfacial strength between matrix and reinforcement

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An Improved Analytical Model for Predicting the Switching Performance of SiC MOSFETs

  • Liang, Mei;Zheng, Trillion Q.;Li, Yan
    • Journal of Power Electronics
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    • v.16 no.1
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    • pp.374-387
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    • 2016
  • This paper derives an improved analytical model to estimate switching loss and analyze the effects of parasitic elements on the switching performance of SiC MOSFETs. The proposed analytical model considers the parasitic inductances, the nonlinearity of the junction capacitances and the nonlinearity of the trans-conductance. The turn-on process and the turn-off process are illustrated in detail, and equivalent circuits are derived and solved for each switching transition. The proposed analytical model is more accurate and matches better with experimental results than other analytical models. Note that switching losses calculated based on experiments are imprecise, because the energy of the junction capacitances is not properly disposed. Finally, the proposed analytical model is utilized to account for the effects of parasitic elements on the switching performance of a SiC MOSFET, and the circuit design rules for high frequency circuits are given.

Optimization simulation for High Voltage 4H-SiC DiMOSFET fabrication (고전압 4H-SiC DiMOSFET 제작을 위한 최적화 simulation)

  • Kim, Sang-Cheol;Bahng, Wook;Kim, Nam-Kyun;Kim, Eun-Dong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07a
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    • pp.353-356
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    • 2004
  • This paper discribes the analysis of the I-V characteristics of 4H-SiC DiMOSFET with single epi-layer Silicon Carbide has been around for over a century. However, only in the past two to three decades has its semiconducting properties been sufficently studied and applied, especially for high-power and high frequency devices. We present a numerical simulation-based optimization of DiMOSFET using the general-purpose device simulator MINIMIS-NT. For simulation, a loin thick drift layer with doping concentration of $5{\times}10^{15}/cm^3$ was chosen for 1000V blocking voltage design. The simulation results were used to calculate Baliga's figure of Merit (BFOM) as the criterion structure optimization and comparison.

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