• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.101-102
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• 2009

SGOI MOSFETs with various Ge mole fractions were fabricated and compared to the SOI MOSFET. SGOI MOSFETs have a lager drain current and higher effective mobility than the SOI MOSFET as increased Ge mole fractions. The lattice constant difference causes lattice mismatch between the SiGe layer and the top-Si layer during the top-Si layer growth. However, SGOI MOSFETs have a lager leakage current at subthreshold region. Also, leakage current at subthreshold region increased with Ge mole fractions. This is attributable to the crystalline defects due to the lattice mismatch between the SiGe layer and the top-Si layer.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1803-1805
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• 2000

This paper analyzes the effects of Ge profiles shape of SiGe heterojunction bipolar transistors (HBT's) for high frequency application. Device simulations using ATLAS/BLAZE for the SiGe HBT with trapezoidal or triangular Ge profile are carried out to optimize the device performance. An HBT with 15% triangular Ge profile shows higher cut-off frequency and DC current gain than that with 19% trapezoidal Ge profile. The cut-off frequency and BC gain are increased from 42GHz to 84GHz and from 200 to 600, respectively.

• Journal of the Korean Vacuum Society
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• v.8 no.2
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• pp.148-152
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• 1999

the low temperature magnetoresistance effect, electron mobilities, and 2 Dimensional electron Gases (2DEG) properties were investigated in $Si/Si_{1-x}Ge_x$ quantum well devices. N-type $Si/Si_{1-x}Ge_x$ structures were fabricated by utilizing a gas source Molecular Beam Epitaxy (GSMBE). Thermal oxidation was carried out in a dry O atmosphere at $700^{\circ}C$ for 7 hours. Electron mobilities were measured by using a Hall effect and a magnetoresistant effect at low temperatures down to 0.4K. Pronounced Shubnikov-de Haas (SdH) oscillations were observed at a low temperature showing two dimensional electron gases (2DEG) in s tensile strained Si quantum well. The electron sheet density (ns) of $1.5\times10^{12}[\textrm{cm}^{-2}]$ and corresponding electron mobility of 14200 $[\textrm{cm}^2V^{-1}s^{-1}]$ were obtained at a low temperature of 0.4K from $Si/Si_{1-x}Ge_x$ structures with thermally grown oxides.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.9 no.2
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• pp.207-211
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• 1999

$Si/Si_{1-x}Ge_x$ MODFET structures, incorporating linearly-graded buffer layers have been grown by GaS Source Molecular Beam Epitaxy. The growth temperature of the graded layers has not significantly changed the distribution of misfit dislocation. However, the surface undulation and surface defects were increased with increasing growth temperature. In $Si/Si_{1-x}Ge_x$ MODFET structures, the densities of misfit dislocations near the Si-active layers were considerably reduced in comparison with the region of graded layers. The electron mobility of $Si/Si_{1-x}Ge_x$ MODFET structure has increased with lowering the growth temperature.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.437-440
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• 1998

We studied phosphorus doping effect on the epitaxial growth of $Si_{1-x}Ge_{x}$ film with high Ge fraction on Si substates at 550.deg. C by LPCVD. In a low $Ph_{3}$ partial pressure region such as below 1.25 mPa, the phosphorus dopant concentration increased linearly with increasing $PH_{3}$ partial pressure while the deposition rate and the Ge fraction were constant. In a higher $PH_{3}$ partial pressure region, the phosphorus dopant concentration and the deposition rate decreased, while the Ge fraction slightly increased. The deposition arate and the Ge fraction increased with increasing $GeH_{4}$ partial pressure while the phophours dopant concentration decreased. But the increasing rate of Ge fraction with incrasing $PH_{3}$ partial pressure was reduced at a high $GeH_{4}$ partial pressure. According to test results, it suggests that high surface coverage of phosphorus atoms suppress both the $SiH_{4}$ adsorption/reasction and the $GeH_{4}$ adsorption/reaction on the surfaces, and the effect is more stronger on $SiH_{4}$ than on $GeH_{4}$. In a higher $PH_{3}$ partial pressure region, the epitaxial growth is largely controlled by surface coverage effect of phosphorus atoms. The phosphorus surface coverage was slimited at a high $GeH_{4}$ partial pressure because adsorbed Ge atoms effectively suppresses the adsorption of phosphorus atoms.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.6
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• pp.847-853
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• 2016

Applications of Si have been increasingly exploited and extended to More-Moore, More-than-Moore, and beyond-CMOS approaches. Ge is regarded as one of the supplements for Si owing to its higher carrier mobilities and peculiar band structure, facilitating both advanced and optical applications. As an emerging metal-oxide device, the junctionless field-effect transistor (JLFET) has drawn considerable attention because of its simple process, less performance fluctuation, and stronger immunity against short-channel effects due to the absence of anisotype junctions. In this study, we investigated lateral field scalability, which is equivalent to channel-length scaling, in Si and Ge JLFETs. Through this, we can determine the usability of Si CMOS and hypothesize its replacement by Ge. For simulations with high accuracy, we performed rigorous modeling for ${\mu}_n$ and ${\mu}_p$ of Ge, which has seldom been reported. Although Ge has much higher ${\mu}_n$ and ${\mu}_p$ than Si, its saturation velocity ($v_{sat}$) is a more determining factor for maximum $I_{on}$. Thus, there is still room for pushing More-Moore technology because Si and Ge have a slight difference in $v_{sat}$. We compared both p- and n-type JLFETs in terms of $I_{on}$, $I_{off}$, $I_{on}/I_{off}$, and swing with the same channel doping and channel length/thickness. $I_{on}/I_{off}$ is inherently low for Ge but is invariant with $V_{DS}$. It is estimated that More-Moore approach can be further driven if Si is mounted on a JLFET until Ge has a strong possibility to replace Si for both p- and n-type devices for ultra-low-power applications.

• Journal of Korean Ophthalmic Optics Society
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• v.1 no.2
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• pp.37-42
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• 1996

The $Bi_{12}(Si,Ge)O_{20}$ single crystals were prepared by Czochralski method and the study of electrical and optical properties were carried out. The activation energy of the electrical conductivity was $E_g$=1.12 eV. The optical energy gap measured in the room temperature is found to be 2.3 eV. A.c. conductivity of crystal $Bi_{12}(Si,Ge)O_{20}$ was measured at temperatures from 290 K to 570 K in the frequency range from 50 kHz to 30 MHz. The a.c. conductivity is proportional to ${\omega}^s$. In view of this it should be hopping conduction mechanisms. At high frequencies, the power exponent was s=2. The low frequency dielectric constants were 54 for $Bi_{12}(Si,Ge)O_{20}$ and 41 for $Bi_{12}(Si,Ge)O_{20}$ single crystals.

• ETRI Journal
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• v.25 no.3
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• pp.203-209
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• 2003

This paper reports on our investigation of DC and RF characteristics of p-channel metal oxide semiconductor field effect transistors (pMOSFETs) with a compressively strained $Si_{0.8}Ge_{0.2}$ channel. Because of enhanced hole mobility in the $Si_{0.8}Ge_{0.2}$ buried layer, the $Si_{0.8}Ge_{0.2}$ pMOSFET showed improved DC and RF characteristics. We demonstrate that the 1/f noise in the $Si_{0.8}Ge_{0.2}$ pMOSFET was much lower than that in the all-Si counterpart, regardless of gate-oxide degradation by electrical stress. These results suggest that the $Si_{0.8}Ge_{0.2}$ pMOSFET is suitable for RF applications that require high speed and low 1/f noise.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.453-456
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• 1998

The electrical properties of $Si_{1-x}Ge_{x}$ samples have been investigated. The sample structures were grown by MBE (molecular geam epitaxy) with Ge mole-fraction of x=0.0, x=0.05, x=0.1, and x=0.2. To examine the influence of the thermal processing, the $O_{2}$ and N$_{2}$ process were performed at 800[.deg. C] and 900[.deg. C], respectively. After this thermal process, hall measurements have been done over a wide range of the ambient temperature between 320[.deg. K] and 10[.deg. K] to find the temperature dependence using the comparessed-He gas system. The Ge-rich layer has been formed at the $SiO_{2}$/SiGe interface and it has an effect on the hall mobility. And it has been found that hall mobility was increased by the $N_{2}$ annealing process comparing with dry oxidation process at both 800[.deg.C] and900[.deg. C].

• Journal of the Korean Vacuum Society
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• v.6 no.S1
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• pp.47-52
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• 1997

Metastable pseudomorphic GeSi layers grown by vapor phase epitaxy on Si(100) substrates were implanted at room temperature. The implantations were performed with 90 KeV As ions to a dose of $1\times 10^{13}\;\textrm{cm}^2$ for $Ge_{0.08}Si_{0.92}$ layers and 709 keV $BF_2^+$ ions to a dose of $3\times 10^{13}\;\textrm{cm}^2$ for $Ge_{0.06}Si_{0.94}$layers. The samples were subsequently annealed for short 10-40 s durations in a lamp furnace with a nitrogen ambient or for a long 30 min period in a vacuum tube furnace. For $Ge_{0.08}Si_{0.92}$samples annealed for a 30 min-longt duration at $700^{\circ}C$ the dopant activation can only reach 50% without introducing significant strain relaxaion whereas samples annealed for short 40s periods (at $850^{\circ}C$) can achieve more than 90% activation without a loss of strain, For $Ge_{0.06}Si_{0.94}$samples annealed for either 40s or 30min at $800^{\circ}C$ full electrical activation of the boron is exhibited in the GeSi epilayer without losing their strain. However when annealed at $900^{\circ}C$ the strain in both implanted and unimplanted layers is partly relaxed after 30min whereas it is not visibly relaxed after 40s.