• Title/Summary/Keyword: Si tip

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Characterization of Electrical Properties and Gating Effect of Single Wall Carbon Nanotube Field Effect Transistor

  • Heo, Jin-Hee;Kim, Kyo-Hyeok;Chung, Il-Sub
    • Transactions on Electrical and Electronic Materials
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    • v.9 no.4
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    • pp.169-172
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    • 2008
  • We attempted to fabricate carbon nanotube field effect transistor (CNT-FET) using single walled carbon nanotube(SWNT) on the heavily doped Si substrate used as a bottom gate, source and drain electrode were fabricated bye-beam lithography on the 500 nm thick $SiO_2$ gate dielectric layer. We investigated electrical and physical properties of this CNT-FET using Scanning Probe Microscope(SPM) and conventional method based on tungsten probe tip technique. The gate length of CNT-FET was 600 nm and the diameter of identified SWNT was about 4 nm. We could observed gating effect and typical p-MOS property from the obtained $V_G-I_{DS}$ curve. The threshold voltage of CNT-FET is about -4.6V and transconductance is 47 nS. In the physical aspect, we could identified SWNT with phase mode of SPM which detecting phase shift by force gradient between cantilever tip and sample surface.

Fabrication of Silicon Nanotemplate for Polymer Nanolens Array

  • Cho, Si-Hyeong;Kim, Hyuk-Min;Lee, Jung-Hwan;Venkatesh, R. Prasanna;Rizwan, Muhammad;Park, Jin-Goo
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.05a
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    • pp.37.1-37.1
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    • 2011
  • Miniaturization of lenses has been widely researched by various scientific and engineering techniques. As a result, micro scaled lens structure could be easily achieved from various fabrication techniques; nevertheless it is still challenging to make nano scaled lenses. This paper reports a novel fabrication method of silicon nanotemplate for nanolens array. The inverse structure of nanolens array was fabricated on silicon substrate by reactive ion etching (RIE) process. This technique has a flexibility to produce different tip shapes using different pattern masks. Once the silicon nano-tip array structure is well-defined using an optimized recipe, it is followed by polymer molding to duplicate nanolens array from the template. Finally, the nanostructures formed on silicon nanotemplate and polymer replica were investigated using FE-SEM and AFM measurements. The nano scaled lens can be manufactured from the same template, also using other replication techniques such as imprinting, injection molding and so on.

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Reliable Measurement Methodology of Wafer Bonding Strength in 3D Integration Process Using Atomic Force Microscopy (삼차원집적공정에서 원자현미경을 활용한 Wafer Bonding Strength 측정 방법의 신뢰성에 관한 연구)

  • Choi, Eunmi;Pyo, Sung Gyu
    • Journal of the Microelectronics and Packaging Society
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    • v.20 no.2
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    • pp.11-15
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    • 2013
  • The wafer bonding process becomes a flexible approach to material and device integration. The bonding strength in 3-dimensional process is crucial factor in various interface bonding process such as silicon to silicon, silicon to metals such as oxides to adhesive intermediates. A measurement method of bonding strength was proposed by utilizing AFM applied CNT probe tip which indicated the relative simplicity in preparation of sample and to have merit capable to measure regardless type of films. Also, New Tool was utilized to measure of tip radius. The cleaned $SiO_2$-Si bonding strength of SPFM indicated 0.089 $J/m^2$, and the cleaning result by RCA 1($NH_4OH:H_2O:H_2O_2$) measured 0.044 $J/m^2$, indicated negligible tolerance which verified the possibility capable to measure accurate bonding strength. And it could be confirmed the effective bonding is possible through SPFM cleaning.

Thermal Design and Batch Fabrication of Full SiO2 SThM Probes for Sensitivity Improvement (주사탐침열현미경의 감도향상을 위한 전체 실리콘 산화막 열전탐침의 열적설계 및 일괄제작)

  • Jaung, Seung-Pil;Kim, Kyeong-Tae;Won, Jong-Bo;Kwon, Oh-Myoung;Park, Seung-Ho;Choi, Young-Ki;Lee, Joon-Sik
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.32 no.10
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    • pp.800-809
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    • 2008
  • Scanning Thermal Microscope (SThM) is the tool that can map out temperature or the thermal property distribution with the highest spatial resolution. Since the local temperature or the thermal property of samples is measured from the extremely small heat transferred through the nanoscale tip-sample contact, improving the sensitivity of SThM probe has always been the key issue. In this study, we develop a new design and fabrication process of SThM probe to improve the sensitivity. The fabrication process is optimized so that cantilevers and tips are made of thermally grown silicon dioxide, which has the lowest thermal conductivity among the materials used in MEMS. The new design allows much higher tip so that heat transfer through the air gap between the sample-probe is reduced further. The position of a reflector is located as far away as possible to minimize the thermal perturbation due to the laser. These full $SiO_2$ SThM probes have much higher sensitivity than that of previous ones.

Effective Control of Stiffness of Tungsten Probe for AFM by Electrochemical Etching (전기화학적 에칭에 의한 AFM용 텅스텐 탐침의 강성 제어)

  • Han, Guebum;Lee, Seungje;Ahn, Hyo-Sok
    • Tribology and Lubricants
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    • v.30 no.4
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    • pp.218-223
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    • 2014
  • This paper presents a method of controlling the stiffness of a tungsten probe for an atomic force microscope (AFM) in order to provide high-quality phase contrast images in accordance with sample characteristics. While inducing sufficient deformation on sample surfaces with commercial Si or $Si_3N_4$ probes is difficult because of their low stiffness, a tungsten probe fabricated by electrochemical etching with appropriately high stiffness can generate relatively large elastic deformation without damaging sample surfaces. The fabrication of the tungsten probe involves two separate procedures. The first procedure involves immersing a tungsten wire with both ends bent parallel to the surface of an electrolyte and controlling the stiffness of the tungsten cantilever by decreasing its diameter using electrochemical etching in the direction of the central axis. The second procedure involves immersing the end of the etched tungsten cantilever in the direction perpendicular to the surface of the electrolyte and fabricating a tungsten tip with a tip radius of 20-50 nm via the necking phenomenon. The latter etching process applies pulse waves every 0.25 seconds to the manufactured tip to improve its yield. Finite element analysis (FEA) of the stiffness of the tungsten probe as a function of its diameter showed that the stiffness of the tungsten probes greatly varies from 56 N/m to 3501 N/m according to the cantilever diameters from $30{\mu}m$ to $100{\mu}m$, respectively. Thus, the proposed etching method is effective for producing a tungsten probe having specific stiffness for optimal use with an AFM and certain samples.

Effect of inorganic filler powder to development of treeing in low density polyethylene (저밀도폴리에틸렌에서 무기질의 충전분이 Treeing 진전에 미치는 영향)

  • 김봉협;강도열;김정수;임기조
    • 전기의세계
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    • v.29 no.8
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    • pp.524-531
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    • 1980
  • In order to investigate the effect of inorganic dielectric fine particle mixed in Low Density Polyethylene on the deterioration by treeing, a comparative study for initiation and development of the tree has been carried out between the pure thin film specimen and the same geometrical specimen mixed with a constant weight percent by a defiend particle size of $Al_{2}$O$_{3}$ and SiO$_{2}$, having larger dielectric constants than that of the base material. According to the results, it has been observed that as increasing dielectric constant, the initiation of tree is expedited, however, the development of the tree reached at the surface of filler particles shows the suppressive trends. From these facts, a reasonable interpretation may be possible by considering the effect of intensified electrical field around the tip in the presence of filler particles, that the initiation and the development of tree are a mechanical break down process caused by Maxwell stress due to the concentration of electrical field at the tip. This suppressive effect is specifically suggestive for the reason that a discharge route must be constructed around the particle surface because of the intensified field strength near filler, which, in turn, reduces the geometrical curvature of the tip so that the local intensity of electrical field can be relaxed. Further more an experimental evidence for this assumption was able to observe in this investigation.

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Nanotribological Characteristics of Plasma Treated Hydrophobic Thin Films on Silicon Surfaces using SPM (SPM을 이용한 Si 표면위에 플라즈마 처리된 소수성 박막의 나노 트라이볼로지적 특성 연구)

  • 윤의성;양승호;공호성;고석근
    • Tribology and Lubricants
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    • v.19 no.2
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    • pp.109-115
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    • 2003
  • Nanotribological characteristics between a Si$_3$N$_4$ AFM tip and hydrophobic thin films were experimentally studied. Tests were performed to measure the nano adhesion and friction in both AFM (atomic force microscope) and LFM (lateral force microscope) modes in various .ranges of normal load. Plasma-modified thin polymeric films were deposited on Si-wafer (100). Results showed that wetting angle of plasma-modified thin polymeric film increased with the treating time, which resulted in the hydrophobic surface and the decrease of adhesion and friction. Nanotribological characteristics of these surfaces were compared with those of other hydrophobic surfaces, such as DLC, OTS and IBAD-Ag coated surfaces. Those of OTS coated surface were superior to those of others, though wetting angle of plasma-modified thin polymeric film is higher.

Characterization of Electrical Properties of Si Nanocrystals Embedded in a SiO$_{2}$ Layer by Scanning Probe Microscopy (Scanning Probe Microscopy를 이용한 국소영역에서의 실리콘 나노크리스탈의 전기적 특성 분석)

  • Kim, Jung-Min;Her, Hyun-Jung;Kang, Chi-Jung;Kim, Yong-Sang
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.54 no.10
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    • pp.438-442
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    • 2005
  • Si nanocrystal (Si NC) memory device has several advantages such as better retention, lower operating voltage, reduced punch-through and consequently a smaller cell area, suppressed leakage current. However, the physical and electrical reasons for this behavior are not completely understood but could be related to interface states of Si NCs. In order to find out this effect, we characterized electrical properties of Si NCs embedded in a SiO$_{2}$ layer by scanning probe microscopy (SPM). The Si NCs were generated by the laser ablation method with compressed Si powder and followed by a sharpening oxidation. In this step Si NCs are capped with a thin oxide layer with the thickness of 1$\~$2 nm for isolation and the size control. The size of 51 NCs is in the range of 10$\~$50 m and the density around 10$^{11}$/cm$^{2}$ It also affects the interface states of Si NCs, resulting in the change of electrical properties. Using a conducting tip, the charge was injected directly into each Si NC, and the image contrast change and dC/dV curve shift due to the trapped charges were monitored. The results were compared with C-V characteristics of the conventional MOS capacitor structure.

Single Carrier Spectroscopy of Bisolitons on Si(001) Surfaces

  • Lyo, In-Whan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.13-13
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    • 2010
  • Switching an elementary excitation by injecting a single carrier would offer the exciting opportunity for the ultra-high data storage technologies. However, there has been no methodology available to investigate the interaction of low energy discrete carriers with nano-structures. In order to map out the spatial dependency of such single carrier level interactions, we developed a pulse-and-probe algorithm, combining with low temperature scanning tunneling microscopy. The new tool, which we call single carrier spectroscopy, allows us to track the interaction with the target macrostructure with tunneling carriers on a single carrier basis. Using this tool, we demonstrate that it is possible not only to locally write and erase individual bi-solitons, reliably and reversibly, but also to track of creation yields of single and multiple bi-solitons. Bi-solitons are pairs of solitons that are elementary out-of-phase excitations on anti-ferromagnetically ordered pseudo-spin system of Si dimers on Si(001)-c(42) surfaces. We found that at low energy tunneling the single bisoliton creation mechanism is not correlated with the number of carriers tunneling, but with the production of a potential hole under the tip. An electric field at the surface determines the density of the local charge density under the tip, and band-bending. However a rapid, dynamic change of a field produces a potential hole that can be filled by energetic carriers, and the amount of energy released during filling process is responsible for the creation of bi-solitons. Our model based on the field-induced local hole gives excellent explanation for bi-soliton yield behaviors. Scanning tunneling spectroscopy data supports the existence of such a potential hole. The mechanism also explains the site-dependency of bi-soliton yields, which is highest at the trough, not on the dimer rows. Our study demonstrates that we can manipulate not just single atoms and molecules, but also single pseudo-spin excitations as well.

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Elementary Studies on the Fabrication and Characteristics of One-dimensional Nanomaterials

  • Kim, Hyeon-U
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2012.05a
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    • pp.150-150
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    • 2012
  • 본 연구는 1차원 나노 구조의 합성과 기초적 분석에 관한 연구로써 특히 무기 산화물 나노재료를 그 대상으로 하였다. 내용으로는 첫째, 1차원 코어 나노와이어의 합성을 하였고 Thermal evaporation, substrate의 가열, 그리고 MOCVD 를 사용한 결과들을 나열한다. 둘째, 코어-쉘 나노와이어를 제작하기 위하여 특히 쉘층의 제작방법을 연구하였는데 PECVD, ALD, 그리고 sputtering에 의한 결과들을 나열하고 간단히 설명한다. Thermal evaporation에 의한 1차원 나노와이어 합성의 경우는 MgO의 예를 들었는데 MgO 나노와이어는 Au가 증착된 기판을 열처리하여 Au dot를 형성하고 이의 morphology를 조절하여 최적의 나노와이어 합성조건을 선정하였다. 이로써 기판 morphology가 나노선의 성장및 형상에 영향을 준다는 사실을 알게 되었다. 이 사실은 In2O3기판을 사용하고 이의 표면거칠기를 열처리로 조절하므로써 역시 나노와이어의 성장을 촉진하는 방법을 찾아내었다. 또한 thermal evaporation공법은 source분말의 선택에 따라 다양한 소재를 제작가능하다는 결과를 제시하였다. 예를 들면 SiOx 층이 precoating된 chamber내에서 MgO 나노선을 합성하는 것과 동일한 조건으로 실험을 진행하면 Mg2SiO4 나노와이어가 형성된 것을 확인하였다. 또한 Sn과 MgB2 분말을 함께 적용할 경우 Sn tip을 가진 MgO 나노와이어를 얻을 수 있었다. 이는 Sn이 동시에 촉매의 역할을 하였기 때문일 것으로 추정된다. 한편 Sn과 Bi 혼합분말을 적용한 경우 Bi2Sn2O7 신소재 tip을 포함한 SnO2 나노와이어를 얻을 수 있었다. 이 경우 Bi원자가 적절한 촉매의 역할을 수행한 것으로 사료된다. Substrate의 가열공법에서는 Si wafer상에 각종 금속 즉 Au, Ag, Cu, Co, Mo, W, Pt, Pd등 초박막을 DC sputter 로 형성한후 annealing하는 기술을 사용하였다. 특기할 만한 것은 Co를 사용한 경우 나노와이어의 spring구조를 얻을 수 있었다는 점이다. MOCVD에 의하여는 Ga2O3및 Bi2O3 나노와이어를 비교적 저온에서 합성하였고 In2O3의 경우는 독특한 나노구조를 형성하였고 이의 결정학적 특성에 대하여 조사하였다.

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