• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
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• pp.1034-1037
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• 2003

Microcrystalline silicon(c-Si:H) thin-film solar cells are prepared with intrinsic Si-layer by hot wire CVD. The operating parameters of solar cells are strongly affected by the filament temperature ($T_f$) during intrinsic layer. Jsc and efficiency abruptly decreases with elevated $T_f$ to $1400^{\circ}C$. This deterioration of solar cell parameters are resulted from increase of crystalline volume fraction and corresponding defect density at high $T_f$. The heater temperature ($T_h$) are also critical parameter that controls device operations. Solar cells prepared at low $T_h$ ($<200^{\circ}C$) shows a similar operating properties with devices prepared at high $T_f$, i.e. low Jsc, Voc and efficiency. The origins for this result, however, are different with that of inferior device performances at high $T_f$. In addition the phase transition of the silicon films occurs at different silane concentration (SC) by varying filament temperature, by which highest efficiency with SC varies with $T_f$.

• Current Photovoltaic Research
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• 제8권4호
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• pp.114-119
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• 2020

In this study, Mitigation of Potential-induced degradation (PID) for PERC solar cells using SiO2 Structure of ARC layer. The conventional PID test was conducted with a cell-level test based on the IEC-62804 test standard, but a copper PID test device was manufactured to increase the PID detection rate. The accelerated aging test was conducted by maintaining 96 hours with a potential difference of 1000 V at a temperature of 60℃. As a result, the PERC solar cell of SiO2-Free ARC structure decreased 22.11% compared to the initial efficiency, and the PERC solar cell of the Upper-SiO2 ARC structure decreased 30.78% of the initial efficiency and the PID reliability was not good. However, the PERC solar cell with the lower-SiO2 ARC structure reduced only 2.44%, effectively mitigating the degradation of PID. Na+ ions in the cover glass generate PID on the surface of the PERC solar cell. In order to prevent PID, the structure of SiNx and SiO2 thin films of the ARC layer is important. SiO2 thin film must be deposited on bottom of ARC layer and the surface of the PERC solar cell N-type emitter to prevent surface recombination and stacking fault defects of the PERC solar cell and mitigated PID degradation.

• Current Photovoltaic Research
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• 제2권3호
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• pp.103-109
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• 2014

Highly efficient hydrogenated nanocrystalline silicon (nc-Si:H) thin-film solar cells were prepared on flexible stainless steel substrates using plasma-enhanced chemical vapor deposition. To enhance the performance of solar cells, material properties of back reflectors, n-doped seed layers and wide bandgap nc-SiC:H window layers were optimized. The light scattering efficiency of Ag back reflectors was improved by increasing the surface roughness of the films deposited at elevated substrate temperatures. Using the n-doped seed layers with high crystallinity, the initial crystal growth of intrinsic nc-Si:H absorber layers was improved, resulting in the elimination of the defect-dense amorphous regions at the n/i interfaces. The nc-SiC:H window layers with high bandgap over 2.2 eV were deposited under high hydrogen dilution conditions. The vertical current flow of the films was enhanced by the formation of Si nanocrystallites in the amorphous SiC:H matrix. Under optimized conditions, a high conversion efficiency of 9.13% ($V_{oc}=0.52$, $J_{sc}=25.45mA/cm^2$, FF = 0.69) was achieved for the flexible nc-Si:H thin-film solar cells.

• 전기학회논문지
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• 제65권10호
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• pp.1694-1696
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• 2016

Present thin film solar cells with hydrogenated amorphous silicon oxide (a-SiO:H) as an absorber suffer from low fill factor(FF) of 61~64 [%] in spite of its benefits related to high open circuit voltage ($V_{oc}$). Since degraded quality of a-SiO:H absorber by alloying with oxygen can affect the FF, we aimed to achieve high photosensitivity by minimizing $CO_2$ gas addition. Improving optical gap($E_{opt}$) has been attained by strong hydrogen dilution combined with lowering substrate temperature down to 100 [$^{\circ}C$]. Small amount of the $CO_2$ was added in order to disturb microcrystalline formation by high hydrogen dilution. The developed a-SiO:H has high photosensitivity (${\sim}2{\times}10^5$) and high $E_{opt}$ of 1.85 [eV], which contributed to attain remarkable FF of 74 [%] and high $V_{oc}$ (>1 [V]). As a result, high power conversion efficiency of 7.18 [%] was demonstrated by using very thin absorber layer of only 100 [nm], even though we processed all experiment at extremely low temperature of 100 [$^{\circ}C$].

• 전기학회논문지
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• 제65권10호
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• pp.1702-1705
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• 2016

We propose a novel hydrogen-reduced p-type amorphous silicon oxide buffer layer between $TiO_2$ antireflection layer and p-type silicon window layer of silicon thin film solar cells. This new buffer layer can protect underlying the $TiO_2$ by suppressing hydrogen plasma, which could be made by excluding $H_2$ gas introduction during plasma deposition. Amorphous silicon oxide thin film solar cells with employing the new buffer layer exhibited better conversion efficiency (8.10 %) compared with the standard cell (7.88 %) without the buffer layer. This new buffer layer can be processed in the same p-chamber with in-situ mode before depositing main p-type amorphous silicon oxide window layer. Comparing with state-of-the-art buffer layer of AZO/p-nc-SiOx:H, our new buffer layer can be processed with cost-effective, much simple process based on similar device performances.

• 반도체디스플레이기술학회지
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• 제14권4호
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• pp.45-49
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• 2015

Using a combined CVD and ALD equipment system, multi-layer quantum well structures of $Al_2O_3/a-Si/Al_2O_3$ were fabricated on silicon Schottky junction devices and implemented to quantum well solar cells, in which the 1~1.5 nm thicknesses of the aluminum oxide films and the a-Si thin film layers were deposited at $300^{\circ}C$ and $450^{\circ}C$, respectively. Fabricated solar cell was operated by tunneling phenomena through the inserted quantum well structure being generated electrons on the silicon surface. Efficiency of the fabricated solar cell inserted with multi-quantum well of 41 layers has been increased by about 10 times that of the solar cell of pure Schottky junction solar cell.

• 한국재료학회지
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• 제16권1호
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• pp.19-24
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• 2006

ZnO:Al(AZO) films prepared by rf magnetron sputtering on glass substrate and textured by post-deposition chemical etching were applied as front contact and back reflectors for ${\mu}c$-Si:H thin film solar cells. For the front transparent electrode contact, AZO films were prepared at various working pressures and substrate temperature and then were chemically etched in diluted HCl(1%). The front AZO films deposited at low working pressure(1 mTorr) and low temperature ($240^{\circ}C$) exhibited uniform and high transmittance ($\geq$80%) and excellent electrical properties. The solar cells were optimized in terms of optical and electrical properties to demonstrate a high short-circuit current.

• 반도체디스플레이기술학회지
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• 제16권2호
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• pp.39-43
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• 2017

It was confirmed that the silicon thin films fabricated on the p-Si (100) substrates by using DIPAS (DiIsoPropylAminoSilane) and TDMA-Sb (Tris-DiMethylAminoAntimony) sources by RPCVD method were amorphous and n-type silicon. The fabricated amorphous n-type silicon films had electron carrier concentrations and electron mobilities ranged from $6.83{\times}10^{18}cm^{-3}$ to $1.27{\times}10^{19}cm^{-3}$ and from 62 to $89cm^2/V{\cdot}s$, respectively. The ideality factor of the pn junction diode fabricated on the p-Si (100) substrate was about 1.19 and the efficiency of the fabricated pn solar cell was 10.87%.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.193-193
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• 2012

In thin film silicon solar cells, p-i-n structure is adopted instead of p/n junction structure as in wafer-based Si solar cells. PECVD is the most widely used thin film deposition process for a-Si:H or ${\mu}c$-Si:H solar cells. Single-chamber PECVD system for a-Si:H solar cell manufacturing has the advantage of lower initial investment and maintenance cost for the equipment. However, in single-chamber PECVD system, doped and intrinsic layers are deposited in one plasma chamber, which inevitably impedes sharp dopant profiles at the interfaces due to the contamination from previous deposition process. The cross-contamination between layers is a serious drawback of single-chamber PECVD system. In this study, a new plasma process to solve the cross-contamination problem in a single-chamber PECVD system was suggested. In order to remove the deposited B inside of the plasma chamber during p-layer deposition, a high RF power was applied right after p-layer deposition with SiH4 gas off, which is then followed by i-layer, n-layer, and Ag top-electrode deposition without vacuum break. In addition to the p-i interface control, various interface control techniques such as FTO-glass pre-annealing in O2 environment to further reduce sheet resistance of FTO-glass, thin layer of TiO2 deposition to prevent H2 plasma reduction of FTO layer, and hydrogen plasma treatment prior to n-layer deposition, etc. were developed. The best initial solar cell efficiency using single-chamber PECVD system of 10.5% for test cell area of 0.2 $cm^2$ could be achieved by adopting various interface control methods.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.153-153
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• 2011

유리나 폴리머를 기판으로 하는 TFT(Thin film transistor), solar cell에서는 낮은 공정 온도에서($200{\sim}500^{\circ}C$) amorphous semiconductor thin film을 poly-crystal semiconductor thin film으로 결정화 시키는 기술이 매우 중요하게 대두 되고 있다. Ge은 Si에 비해 높은 carrier mobility와 낮은 녹는점을 가지므로, 비 저항이 낮을 뿐만 아니라 더 낮은 온도에서 결정화 할 수 있다. 하지만 일반적으로 쓰이는 Ge의 결정화 방법은 비교적 높은 열처리 온도를 필요로 하거나, 결정화된 원소에 남아있는 metal이 불순물 역할을 한다는 문제점, 그리고 불균일한 결정크기를 만든다는 단점이 있었다. 그 중에서도 현재 가장 많이 쓰이고 있는 MIC, MILC는 metal과 a-Ge이 접촉되는 interface나, grain boundary diffusion에 의해 핵 생성이 일어나고, 결정이 성장하는 메커니즘을 가지고 있으므로 단순 증착과 열처리 만으로는 앞서 말한 단점을 극복하는데 한계를 가지고 있다. 이에 PIII&D 장비를 이용하면, 이온 주입된 원소들이 모재와 반응 할 수 있는 표면적이 커짐으로 핵 생성을 조절 할 수 있을 뿐만 아니라, 이온 주입 시 발생하는 self annealing effect로 결정 크기까지도 조절할 수 있다. 또한 이러한 모든 process가 한 진공 장비 내에서 이루어지므로 장비의 단순화와, 공정간 단계별로 발생하는 불순물과 표면산화를 막을 수 있으므로 절연체 위에 저항이 낮고, hall mobility가 높은 poly-crystalline Ge thin film을 만들 수 있다. 본 연구에서는, 주로 핵 생성과정에서 seed를 만드는 이온주입 조건과, 결정 성장이 일어나는 증착 조건에 따라서 Ge의 결정방향과 크기가 많은 차이를 보이는데, 이는 HR-XRD(High resolution X-ray Diffractometer)와 Raman spectroscopy를 이용하여 측정 하였으며, SEM과 AFM으로 결정의 크기와 표면 거칠기를 측정하였다. 또한 Hall effect measurement를 통해 poly-crystalline thin film 의 저항과 hall mobility를 측정하였다.