• Proceedings of the KAIS Fall Conference
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• 2001.11a
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• pp.169-172
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• 2001

다층 MEMS구조의 기초기판쌍 소재로 쓰일 수 있는 Si∥SiO₂/Si₃N₄∥Si 기판쌍의 직접접합 가능성을 확인하기 위해서 2000Å-SiO₂와 500Å-Si₃N₄층을 가진 직경 10cm의 실리콘 기판을 각각 친수성 및 소수성 표면세척을 하고 청정분위기에서 경면끼리 가접을 실시하였다. 가접된 기판쌍을 통상의 박스형 전기로를 이용하여 400, 600, 800, 1000, 1200℃ 범위에서 2시간 동안 가열하여 접합을 완료하였다. 완성된 기판쌍을 적외선분석기를 이용하여 접합면적을 확인하였고, 면도칼 삽입법으로 접합계면에너지를 측정하였다. 실험온도 범위 내에서 Si∥SiO₂/Si₃N₄∥Si 기판쌍은 1000℃ 이상에서 접합계면에너지는 2,344mJ/㎡을 나타냈으며, 이는 기존의 Si/Si의 동종접합기판쌍과 동등한 수준의 접합강도로서 부가가치가 큰 새로운 조합의 기판쌍 제조가 가능하였다.

• Korean Journal of Materials Research
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• v.11 no.5
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• pp.427-430
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• 2001

We prepared 10cm-diameter Si(100)/500 $\AA$-Si$_3$N$_4$/Si(100) wafer Pairs adopting 500 $\AA$ -thick Si$_3$N$_4$layer as insulating layer between single crystal Si wafers. Si3N, is superior to conventional SiO$_2$ in insulating. We premated a p-type(100) Si wafer and 500 $\AA$ -thick LPCVD Si$_3$N$_4$∥Si (100) wafer in a class 100 clean room. The cremated wafers are separated in two groups. One group is treated to have hydrophobic surface and the other to have hydrophilic. We employed a FLA(fast linear annealing) bonder to enhance the bond strength of cremated wafers at the scan velocity of 0.1mm/sec with varying the heat input at the range of 400~1125W. We measured bonded area using a infrared camera and bonding strength by the razor blade crack opening method. We used high resolution transmission electron microscopy(HRTEM) to probe cross sectional view of bonded wafers. The bonded area of two groups was about 75%. The bonding strength of samples which have hydrophobic surface increased with heat input up to 1577mJ/$m^2$ However, bonding strength of samples which have hydrophilic surface was above 2000mJ/$m^2$regardless of heat input. The HRTEM results showed that the hydrophilic samples have about 25 $\AA$ -thick SiO layer between Si and Si$_3$N$_4$/Si and that maybe lead to increase of bonding strength.

• Korean Journal of Materials Research
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• v.11 no.7
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• pp.556-561
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• 2001

We prepared a new a SOS(silicon-on-silicide) wafer pair which is consisted of Si(100)/1000$\AA$-NiSi Si (100) layers. SOS can be employed in MEMS(micro- electronic-mechanical system) application due to low resistance of the NiSi layer. A thermally evaporated $1000\AA$-thick Ni/Si wafer and a clean Si wafer were pre-mated in the class 100 clean room, then annealed at $300~900^{\circ}C$ for 15hrs to induce silicidation reaction. SOS wafer pairs were investigated by a IR camera to measure bonded area and probed by a SEM(scanning electron microscope) and TEM(transmission electron microscope) to observe cross-sectional view of Si/NiSi. IR camera observation showed that the annealed SOS wafer pairs have over 52% bonded area in all temperature region except silicidation phase transition temperature. By probing cross-sectional view with SEM of magnification of 30,000, we found that $1000\AA$-thick uniform NiSi layer was formed at the center area of bonded wafers without void defects. However we observed debonded area at the edge area of wafers. Through TEM observation, we found that $10-20\AA$ thick amourphous layer formed between Si surface and NiSix near the counter part of SOS. This layer may be an oxide layer and lead to degradation of bonding. At the edge area of wafers, that amorphous layer was formed even to thickness of $1500\AA$ during annealing. Therefore, to increase bonding area of Si NiSi ∥ Si wafer pairs, we may lessen the amorphous layers.

• Proceedings of the Materials Research Society of Korea Conference
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• 2001.11a
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• pp.151-151
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• 2001

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.11a
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• pp.159-159
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• 2003

• Korean Journal of Materials Research
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• v.10 no.10
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• pp.665-670
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• 2000

Linear annealing method was developed to increase the bond strength of Si wafer pair mated at room tem­perature instead of conventional furnace annealing method. It has been known that the interval of the two mating wafer surfaces decreases and the density of gaseous phases generated at the interface increases with increase in an-nealing temperature. The new annealing method consisting of one heat source and light reflecting mirror used these two phenomena and was applied to Si$\mid$$\mid$Si and Si$\mid$$\mid$$SiO_2/Si$ bonding. The bonding interface observed directly by using IR camera and HRTEM showed clear bonding interface without any unbonded areas except the area generated by the dusts inserted into the mating interface at the room temperature. Crack opening method and direct tensile test was ap­pplied to measure the bond strength. The two methods showed similar results. The bond strength increased continuous­tly with the increase of annealing temperature.

• Proceedings of the Materials Research Society of Korea Conference
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• 2002.05a
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• pp.121-121
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• 2002

• Proceedings of the Materials Research Society of Korea Conference
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• 2000.11a
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• pp.97-97
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• 2000

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2000.11a
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• pp.43-44
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• 2000

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.10
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• pp.859-864
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• 2003

We prepared SOI(silicon-on-insulator) wafer pairs of Si II SiO$_2$/Si$_3$N$_4$ II Si using wafer direct bonding with an electric furnace annealing(EFA), a fast linear annealing(FLA), and a rapid thermal annealing(RTA), respectively, by varying the annealing temperatures at a given annealing process. We measured the bonding area and the bonding strength with processes. EFA and FLA showed almost identical bonding area and theoretical bonding strength at the elevated temperature. RTA was not bonded at all due to warpage, We report that FLA process was superior to other annealing processes in aspects of surface temperature, annealing time, and bonding strength.