• Journal of Electrical Engineering and Technology
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• 제10권4호
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• pp.1597-1609
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• 2015

This paper introduces the fundamentals of the conventional LC low-pass filter circuit in the fractional domain. First, we study the new fundamentals of fractional-order LC low-pass filter circuit including the pure real angular frequency, the pure imaginary angular frequency and the short circuit angular frequency. Moreover, sensitivity analysis of the impedance characteristics and phase characteristics of the LC low-pass filter circuit with respect to the system variables is studied in detail, which shows the greater flexibility of the fractional-order filter circuit in designs. Furthermore, from the filtering property perspective, we systematically investigate the effects of the system variables (LC, frequency f and fractional orders) on the amplitude-frequency characteristics and phase-frequency characteristics. In addition, the detailed analyses of the cut-off frequency and filter factor are presented. Numerical experimental results are presented to verify the theoretical results introduced in this paper.

• Journal of information and communication convergence engineering
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• 제6권3호
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• pp.275-278
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• 2008

In this paper, I propose the full CMOS FLL(frequency locked loop) circuit. The proposed FLL circuit has a simple structure which contains a FVC(frequency-to-voltage converter), an operational amplifier and a VCO(voltage controlled oscillator). The operation of FLL circuit is based on frequency comparison by the two FVC circuit blocks. The locking time of FLL is short compared to PLL(phase locked loop) circuit because the output signal of FLL is synchronized only in frequency. The circuit is designed by 0.35${\mu}m$ process and simulation carried out with HSPICE. Simulation results are shown to illustrate the performance of the proposed FLL circuit.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2010년도 하계학술대회 논문집
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• pp.37-38
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• 2010

For MHz-class high frequency inverter in wireless power transfer applications, the voltage/current surges can be occurred in power stage when driving on the inverter. And also, the high-frequency oscillations can be produced at a high switching frequency due to the parasitic elements. The voltage and current stresses of the switching devices lead to the switching losses. The efficiency of the high frequency inverter will be reduced. And the inverter circuit with the sudden voltage and current fluctuations also generates the noise such as the EMI. Zero voltage, zero current switching technique can be used to reduce the switching loss and the noise. The high power density and high efficiency can be obtained. In this paper, the high-frequency inverter for short-range wireless power transfer applications was discussed. The feasible inverter circuit is analyzed in the circuit operating characteristics and the results are verified by the simulation.

• Journal of Welding and Joining
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• 제18권5호
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• pp.41-48
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• 2000

Dynamic behaviors of the GMAW system are simulated using the short-circuit transfer model and the characteristic equations fir the power supply, wire system and arc. The conventional wire equation, which relates the rate change of the wire extension to the wire feed rate and melting rate, is modified to include effects of the molten drop attached at the wire tip. The modified wire equation describes behaviors of the GMAW system more precisely and provides information about the initial bridge volume for short-circuit transfer. The proposed short-circuit model predicts the variation of parameters such as the current, voltage, short-circuit frequency and time considering the effects of the surface tension and electromagnetic force due to current. The calculated results are in broad agreements with the experimental results under the argon shielding condition.

• Journal of information and communication convergence engineering
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• 제7권1호
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• pp.62-65
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• 2009

In this paper, the temperature characteristics of full CMOS FLL(frequency locked loop) re analyzed. The FLL circuit is used to generate an output signal that tracks an input efference signal. The locking time of FLL is short compared to PLL(phase locked loop) circuit because the output signal of FLL is synchronized only in frequency. Also the FLL s designed to allow the circuit to be fully integrated. The FLL circuit is composed two VCs, two buffers, a VCO and two frequency dividers. The temperature variation of frequency divider, FVC and buffer cancelled because the circuit structure. is the same and he temperature effect is cancelled by the comparator. Simulation results are shown to illustrate the performance of the designed FLL circuit with temperature.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1999년도 제14차 학술회의논문집
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• pp.281-283
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• 1999

This topic presents an inductor short turn testing. From the rudimentary principles, the quality factor(Q) decreases due to inductor short turn. Frequency response varies because of the variation of circuit inductance and resistance. In general, short turn circuit testing is performed by comparing the ratio of an inductance and resistance of inductor in that particular circuit. An alternative method can be done by considering the response of second order circuit which can give both dynamic and static testing, whereas static testing give an error results not more than 2 turns. For dynamic testing, the result is more accurate, which can test fur the short turn number form 1 turn onward.

• Journal of Welding and Joining
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• 제14권5호
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• pp.145-150
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• 1996

The variation of spatter generation in gas metal arc welding with welding conditions and wire compositions was investigated and interpreted in terms of arc stability. The transition range from a short circuit mode to a spray mode in the mixed gas welding showed an unstable arc and generated the largest amount of spatters. Titanium reduced spatters only in the globular mode of $CO_2$welding and silicon and manganese showed the same effect The effect of silicon and manganese, however, was no longer seen when titanium was added simultaneously to the wire. It is believed that deoxidizers easily form oxides on the anode and make the arc stable even in DCRP welding. The wires with deoxidizers also showed low short circuit frequency, resulting in the increase of large size spatters.

• Journal of Welding and Joining
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• 제14권5호
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• pp.106-112
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• 1996

The effects of Ti addition in welding wire on the spatter generation and the droplet transfer phenomena were investigated. With increasing Ti content the spattering rate was decreased but the ratio of large size spatter (D $\geq$ 1. 0mm) was increased in both short circuit and globular transfer mode of $CO_2$welding. In short circuit transfer region, the arcing time was increased and the droplet transfer frequency was decreased with increasing Ti content In globular transfer region, the transition current and voltage to globular transfer was lowered and the welding condition region for stable globular transfer was widened with increasing Ti content.

• Journal of information and communication convergence engineering
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• 제8권2호
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• pp.197-200
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• 2010

The FLL(frequency locked loop) circuit is used to generate an output signal that tracks an input reference signal. The locking time of FLL is short compared to PLL(phase locked loop) circuit because the output signal of FLL is synchronized only in frequency. Also the FLL is designed to allow the circuit to be fully integrated. In this paper, the temperature stable FLL circuit is designed by using full CMOS transistors. When the temperature is varied from $-20^{\circ}C$ to $70^{\circ}C$, the variation of output frequency is about from -2% to 1.6% from HSPICE simulation results.

• IEIE Transactions on Smart Processing and Computing
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• 제3권6호
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• pp.425-429
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• 2014

This paper proposes a DC-DC Buck-Converter with DT-CMOS (Dynamic Threshold-voltage MOSFET) Switch. The proposed circuit was evaluated and compared with a CMOS switch by both the circuit and device simulations. The DT-CMOS switch reduced the output ripple and the conduction loss through a low on-resistance. Overall, the proposed circuit showed excellent performance efficiency compared to the converter with conventional CMOS switch. The proposed circuit has switching frequency of 1.2MHz, 3.3V input voltage, 2.5V output voltage, and maximum current of 100mA. In addition, this paper proposes a SCP (Short Circuit Protection) circuit to ensure reliability.