• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.8
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• pp.461-465
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• 2016

n-type silicon shows the better tolerance towards metal impurities with a higher minority carrier lifetime compared to p-type silicon substrate. Due to better lifetime stability as compared to p-type during illumination made the photovoltaic community to switch toward n-type wafers for high efficiency silicon solar cells. We fabricated the front electrode of the n-type solar cell with AgAl paste. The electrodes characteristics of the AgAl paste depend on the contact junction depth that is closely related to the firing temperature. Metal contact depth with p+ emitter, with optimized depth is important as it influence the resistance. In this study, we optimize the firing condition for the effective formation of the metal depth by varying the firing condition. The firing was carried out at temperatures below $670^{\circ}C$ with low contact depth and high contact resistance. It was noted that the contact resistance was reduced with the increase of firing temperature. The contact resistance of $5.99m{\Omega}cm^2$ was shown for the optimum firing temperature of $865^{\circ}C$. Over $900^{\circ}C$, contact junction is bonded to the Si through the emitter, resulting the contact resistance to shunt. we obtained photovoltaic parameter such as fill factor of 76.68%, short-circuit current of $40.2mA/cm^2$, open-circuit voltage of 620 mV and convert efficiency of 19.11%.

• Proceedings of the Optical Society of Korea Conference
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• 2005.07a
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• pp.28-29
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• 2005

본 논문에서는 MEH-PPV와 DFPP의 폴리머 물질을 이용하여 photovoltaic device가 제작되었고, 그림 1에 두 물질의 분자 구조가 보여진다. Photovoltaic cell의 전기-광학적 특성은 활성층의 폴리머 물질에 의해 결정된다. 이러한 특성을 알아보기 위해서 홉수 스펙트럼이 측정되었다. DFPP는 chloroform, chlorobenzen, THF, acetone에 잘 녹았으며, 본 논문에서는 chloroform이 용매로 사용되었다. 제작 공정은 다음과 같다. 인듐 주석 산화물 (ITO)이 증착된 유리기판은 photolithography 공정을 거친 후, 왕수(HNO$_{3}$ + HCL)로 식각됨으로서 전극의 패턴이 제작되었다. 그리고 ITO 전극 패턴 된 유리기판 위에 PEDOT (CH8000, Baytron)이 코팅된 후 Ar이 주입되는 Convection Oven을 이용하여 120$^{\circ}$C에서 2시간 동안 열처리되어 수분이 제거되었다. 활성층에는 MEH-PPV와 DFPP가 9:1과 2.33:1로 혼합된 폴리머가 사용되었고, 이것은 0.3 %w.t.가 되도록 chloroform에 넣어 5시간 동안 스핀바를 돌려서 용해되었다. 이 용액은 ITO 전극 패턴이 형성된 글라스 위에 3000 rpm으로 45 초간 스핀코팅 되었다. 이 때 얻어진 유기물 박막층은 80$^{\circ}$C의 Ar이 주입되는 convection oven에서 3시간 동안 경화되었다. 경화된 단층 유기물 박막층 위에 Li-Al이 1000 ${\AA}$의 두께로 증착되어 전극이 형성되었고, 이후 질소가 채워진 globe box에서 소자는 encapsulation되어 산소와 수분에 대한 영향으로부터 차단되었다. 상기의 공정으로 제작된 소자의 박막구조는 그림 2에서 보여진다. 그림 3은 MEH-PPV와 DFPP를 혼합했을 때의 흡수 스펙트럼이다. 최대 흡수 파장은 511 nm였다. 그리고 photovoltaic cell의 V-I 특성 결과가 그림 4와 같이 측정되었다. 측정에서는 300${\sim}$700 nm의 파장대를 갖는 태양광 모사계가 사용되었고, 셀의 면적은 10 mm$^{2}$였다. 그림 5의 I-V 특성으로부터 MEH-PPV와 DFPP가 9:1 로 혼합했을 때보다 2.33:1 로 혼합했을 때, photovoltaic device의 효율이 향상됨을 확인할 수 있다. 빛이 75 mW/cm$^{2}$ 의 세기로 조사될 때 9:1과 2.33:1로 혼합된 소자의 open circuit voltage (V$_{oc}$)는 비슷하지만, short circuit current Density (J$_{sc}$)는 각각 -1.39 ${\mu}$A/cm$^{2}$ 와 -3.72${\mu}$A/cm$^{2}$ 로 약 2.7배 정도 증가되었음을 볼 수 있다. 이러한 결과를 통해 electron acceptor인 DFPP의 비율이 높아질수록 photovoltaic cell의 conversion efficiency가 더 크게 됨을 확인할 수 있다. 그러므로 효율이 최대가 되는 두 폴리머의 혼합 비율이 최적화되는 조건을 찾는 것은 매우 중요한 연구가 될 것이다.

• Korean Journal of Materials Research
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• v.23 no.1
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• pp.35-40
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• 2013

In this study, the influence on the surface passivation properties of crystalline silicon according to silicon wafer thickness, and the correlation with a-Si:H/c-Si heterojunction solar cell performances were investigated. The wafers passivated by p(n)-doped a-Si:H layers show poor passivation properties because of the doping elements, such as boron(B) and phosphorous(P), which result in a low minority carrier lifetime (MCLT). A decrease in open circuit voltage ($V_{oc}$) was observed when the wafer thickness was thinned from $170{\mu}m$ to $50{\mu}m$. On the other hand, wafers incorporating intrinsic (i) a-Si:H as a passivation layer showed high quality passivation of a-Si:H/c-Si. The implied $V_{oc}$ of the ITO/p a-Si:H/i a-Si:H/n c-Si wafer/i a-Si:H/n a-Si:H/ITO stacked layers was 0.715 V for $50{\mu}m$ c-Si substrate, and 0.704 V for $170{\mu}m$ c-Si. The $V_{oc}$ in the heterojunction solar cells increased with decreases in the substrate thickness. The high quality passivation property on the c-Si led to an increasing of $V_{oc}$ in the thinner wafer. Short circuit current decreased as the substrate became thinner because of the low optical absorption for long wavelength light. In this paper, we show that high quality passivation of c-Si plays a role in heterojunction solar cells and is important in the development of thinner wafer technology.

• Solar Energy
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• v.11 no.3
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• pp.74-83
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• 1991

In this study, the (p)ZnTe/(n)Si solar cell and (n)CdS-(p)ZnTe/(n)Si poly-junction thin film are fabricated by vaccum deposition method at the substrate temperature of $200{\pm}1^{\circ}C$ and then their electrical properties are investigated and compared each other. The test results from the (p)ZnTe/(n)Si solar cell the (n)CdS-(p)ZnTe/(n)Si poly-junction thin fiim under the irradiation of solar energy $100[mW/cm^2]$ are as follows; Short circuit current$[mA/cm^2]$ (p)ZnTe/(n)Si:28 (n)CdS-(p)ZnTe/(n)Si:6.5 Open circuit voltage[mV] (p)ZnTe/(n)Si:450 (n)CdS-(p)ZnTe/(n)Si:250 Fill factor (p)ZnTe/(n)Si:0.65 (n)CdS-(p)ZnTe/(n)Si:0.27 Efficiency[%] (p)ZnTe/(n)Si:8.19 (n)CdS-(p)ZnTe/(n)Si:2.3 The thin film characteristics can be improved by annealing. But the (p)ZnTe/(n)Si solar cell are deteriorated at temperatures above $470^{\circ}C$ for annealing time longer than 15[min] and the (n)CdS-(p)ZnTe/(n)Si thin film are deteriorated at temperature about $580^{\circ}C$ for longer than 15[min]. It is found that the sheet resistance decreases with the increase of annealing temperature.

• Journal of the Korean Vacuum Society
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• v.21 no.4
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• pp.219-224
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• 2012

We study for long-term performance of amorphous silicon solar cells under light exposure. The performance is predicted with a kinetic model in which the carrier lifetimes are determined by the defect density. In particular, the kinetic model is described by the stretched-exponential relaxation of defects to reach equilibrium. In this report, we simulate the light-induced degradation of the amorphous silicon solar cells with the kinetic model and AMPS-1D computer program. And data measured for outdoor performances of various solar cells are compared with the simulated results. This study focuses on examining the light-induced degradation for the following amorphous silicon pin solar cells: thickness${\approx}$300 nm, built-in potential${\approx}$1.05 V, defect density (at t=0)${\approx}5{\times}10^{15}cm^{-3}$, short-circuit current density (at t=0)${\approx}15.8mA/cm^2$, fill factor (at t=0)${\approx}0.691$, open-circuit voltage (at t=0)${\approx}0.865V$, conversion efficiency (at t=0)${\approx}9.50%$.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.153-153
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• 2010

p-i-n 형 비정질 실리콘 박막 태양전지에서 p층은 창물질(window material)로서 전기 전도도가 크고, 빛 흡수가 적어야한다. p층의 두께가 얇으면 p층 전체가 depletion layer가 되고 충분한 diffusion potential을 얻을 수 없어 open-circuit voltage ($V_{oc}$)가 작아진다. 반대로 p층 두께가 두꺼워지면 빛 흡수가 증가하고, 표면 재결합이 문제가 되어 변환효율이 감소한다. 밴드갭이 큰 물질로 창층을 제작하게 되면 보다 짧은 파장의 입사광이 직접 i층을 비추므로 Short-circuit current ($I_{sc}$) 와 fill factor를 증가시킬 수 있다. 하여 본 연구에서는 기존의 창층으로 사용되는 Boron을 doping한 p-type a-Si:H 대신에 $N_2O$를 첨가한 p-type a-$SiO_x$:H의 $N_2O$ flow rate에 따른 밴드갭의 변화에 관한 연구를 수행하였다. p-type a-$SiO_x$:H Layer는 $SiH_4$, $H_2$, $N_2O$, $B_2H_6$ 가스를 혼합하여 증착하게 되는데 $SiH_4$, 가스와 $H_2$ 가스의 혼합비는 1:20, $B_2H_6$ 농도는 0.5%로 고정 하였으며 $N_2O$의 flow rate을 가변하며 증착하였다. $N_2O$의 가변조건은 5에서 50sccm으로 가변하여 증착하며 일반적으로 사용되는 RF-PECVD (13.56MHz)를 이용하였고 증착 온도는 175도, 전극간의 거리는 40mm, 파워와 압력은 30W, 700mTorr로 고정하여 진행하였다. 전기적 특성을 알아보기 위해 eagle 2000 Glass를 사용하였고 구조적 특성은 p-type wafer를 사용하여 각각 대략 200nm의 두께로 증착하였다. 증착 두께는 Ellipsometry를 이용하였으며 전기 전도도는 Agilent사의 4156c를 구조적특성은 FT-IR을 사용하여 측정하였다. Conductivity(${\sigma}_d$)는 $N_2O$가 증가함에 따라 $8.73\;{\times}\;10^{-6}$에서 $5.06\;{\times}\;10^{-7}$으로 감소하였고 optical bandgap ($E_{opt}$)은 1.71eV에서 2.0eV로 증가함을 알 수 있었다. 또한 reflective index(n)의 경우는 4.32에서 3.52로 감소함을 나타내었다. 기존의 p-type a-Si:H에 비해 상당한 $E_{opt}$을 가지므로 빛 흡수에 의한 손실을 줄임으로서 $V_oc$를 향상 시킬 수 있으며 동시에 짧은 파장에서의 입사광이 직접 i층을 비추므로 $I_{sc}$와 FF를 향상 시킬 수 있으리라 예상된다. 다소 낮은 전도도만 개선한다면 고효율의 박막 태양전지를 제작 할 수 있을 것으로 기대된다.

• Journal of Powder Materials
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• v.31 no.1
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• pp.16-22
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• 2024

Composite-based piezoelectric devices are extensively studied to develop sustainable power supply and self-powered devices owing to their excellent mechanical durability and output performance. In this study, we design a lead-free piezoelectric nanocomposite utilizing (Ba_0.85 Ca_0.15)(Ti_0.9Zr_0.1)O₃ (BCTZ) nanomaterials for realizing highly flexible energy harvesters. To improve the output performance of the devices, we incorporate porous BCTZ nanowires (NWs) into the nanoparticle (NP)-based piezoelectric nanocomposite. BCTZ NPs and NWs are synthesized through the solid-state reaction and sol-gel-based electrospinning, respectively; subsequently, they are dispersed inside a polyimide matrix. The output performance of the energy harvesters is measured using an optimized measurement system during repetitive mechanical deformation by varying the composition of the NPs and NWs. A nanocomposite-based energy harvester with 4:1 weight ratio generates the maximum open-circuit voltage and short-circuit current of 0.83 V and 0.28 ㎂, respectively. In this study, self-powered devices are constructed with enhanced output performance by using piezoelectric energy harvesting for application in flexible and wearable devices.

• Applied Chemistry for Engineering
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• v.24 no.1
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• pp.31-37
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• 2013

Lowering surface reflectance of Si wafers by texturization is one of the most important processes for improving the efficiency of Si solar cells. This paper presents the results on the effect of texturing using acidic solution mixtures containing the catalytic agents to moderate etching rates on the surface morphology of mc-Si wafer as well as on the performance parameters of solar cell. It was found that the treatment of contaminated crystalline silicon wafer with $HNO_3-H_2O_2-H_2O$ solution before the texturing helps the removal of organic contaminants due to its oxidizing properties and thereby allows the formation of nucleation centers for texturing. This treatment combined with the use of a catalytic agent such as phosphoric acid improved the effects of the texturing effects. This reduced the reflectance of the surface, thereby increased the short circuit current and the conversion efficiency of the solar cell. Employing this technique, we were able to fabricate mc-Si solar cell of 16.4% conversion efficiency with anti-reflective (AR) coating of silicon nitride film using plasma-enhanced chemical vapor deposition (PECVD) and Si wafers can be texturized in a short time.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.5
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• pp.608-614
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• 2018

In addition to the diffusion of ICT technology, various protocols of short range wireless communication technology are being applied for efficient information operation. However, due to limitations of short-range wireless communication, communication is not smooth in places where frequency environment is poor, such as frequency confusion and warehouse type factory. When an alternative is needed. The development of LED technology and expansion of infrastructure through LED based visible light communication is attracting attention as an alternative and spreading the usage in wide range now a days. In addition, the infrastructure has been expanded with solar panels in response to the development of smarthome built-in with renewable energy. In this situation, visible light communication using PD has been limitedly applied in a near environment where the receiving angle of the PD and the ambient light ensure the LoS and the influence of the ambient light is small. In order to solve this problem, we have implemented visible light communication using LED lighting with large current infrastructure and solar panel with large receiving area, and proposed a circuit for restoring accurate data even in ambient light. Through this study results, it is expected that visible light communication can be more widely used and this result used as the base data for visible light communication research using the solar panel as the receiver.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.7
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• pp.1235-1242
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• 2008

In this paper, x-ray image sensor of photon counting type having a $32{\times}32$ pixel array is designed with $0.18{\mu}m$ triple-well CMOS process. Each pixel of the designed image sensor has an area of loot $100{\times}100\;{\mu}m2$ and is composed of about 400 transistors. It has an open pad of an area of $50{\times}50{\mu}m2$ of CSA(charge Sensitive Amplifier) with x-ray detector through a bump bonding. To reduce layout size, self-biased folded cascode CMOS OP amp is used instead of folded cascode OP amp with voltage bias circuit at each single-pixel CSA, and 15-bit LFSR(Linear Feedback Shift Register) counter clock generator is proposed to remove short pulse which occurs from the clock before and after it enters the counting mode. And it is designed that sensor data can be read out of the sensor column by column using a column address decoder to reduce the maximum current of the CMOS x-ray image sensor in the readout mode.