• Journal of Korea Society of Digital Industry and Information Management
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• v.9 no.4
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• pp.135-141
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• 2013

String matching is one of the key algorithms in network security and many areas could be benefit from a faster string matching algorithm. Based on the most efficient string matching algorithm in sual applications, the Boyer-Moore (BM) algorithm, a novel algorithm called RQS is proposed. RQS utilizes an improved bad character heuristic to achieve bigger shift value area and an enhanced good suffix heuristic to dramatically improve the worst case performance. The two heuristics combined with a novel determinant condition to switch between them enable RQS achieve a higher performance than BM both under normal and worst case situation. The experimental results reveal that RQS appears efficient than BM many times in worst case, and the longer the pattern, the bigger the performance improvement. The performance of RQS is 7.57~36.34% higher than BM in English text searching, 16.26~26.18% higher than BM in uniformly random text searching, and 9.77% higher than BM in the real world Snort pattern set searching.

• Korea-Australia Rheology Journal
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• v.21 no.1
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• pp.13-16
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• 2009

We investigate time-temperature superposition from the viewpoint of geometry. The arc length of viscoelastic plots provides powerful resolution for check of the validity of time-temperature superposition. We also suggest a new algorithm for determination of shift factor which is base on the minimization of the total arc length and does not assume any functional form of viscoelastic function.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.462-462
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• 2004

• The Journal of Korean Institute of Communications and Information Sciences
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• v.16 no.9
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• pp.893-900
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• 1991

And this system is compared with past knapsack system by implementation of low density attack in Brickell and Lagarias, Odlyzko’s method. Also the VLSI architecture for parallel implementation of this linearly shift knapsack system is presented

• Journal of Broadcast Engineering
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• v.21 no.3
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• pp.425-435
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• 2016

In this paper, we propose a classification model by analyzing raw material images recorded using a color CCD camera to automatically classify good and defective agricultural products such as rice, coffee, and green tea, and raw materials. The current classifying agricultural products mainly depends on visual selection by skilled laborers. However, classification ability may drop owing to repeated labor for a long period of time. To resolve the problems of existing human dependant commercial products, we propose a vision based automatic raw material classification combining mean shift clustering and stepwise region merging algorithm. In this paper, the image is divided into N cluster regions by applying the mean-shift clustering algorithm to the foreground map image. Second, the representative regions among the N cluster regions are selected and stepwise region-merging method is applied to integrate similar cluster regions by comparing both color and positional proximity to neighboring regions. The merged raw material objects thereby are expressed in a 2D color distribution of RG, GB, and BR. Third, a threshold is used to detect good and defective products based on color distribution ellipse for merged material objects. From the results of carrying out an experiment with diverse raw material images using the proposed method, less artificial manipulation by the user is required compared to existing clustering and commercial methods, and classification accuracy on raw materials is improved.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.7
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• pp.1267-1275
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• 2017

This paper describes a design of cryptographic processor supporting 233-bit elliptic curves over binary field defined by NIST. Scalar point multiplication that is core arithmetic in elliptic curve cryptography(ECC) was implemented by adopting modified Montgomery ladder algorithm, making it robust against simple power analysis attack. Point addition and point doubling operations on elliptic curve were implemented by finite field multiplication, squaring, and division operations over $GF(2^{233})$, which is based on affine coordinates. Finite field multiplier and divider were implemented by applying shift-and-add algorithm and extended Euclidean algorithm, respectively, resulting in reduced gate counts. The ECC processor was verified by FPGA implementation using Virtex5 device. The ECC processor synthesized using a 0.18 um CMOS cell library occupies 49,271 gate equivalents (GEs), and the estimated maximum clock frequency is 345 MHz. One scalar point multiplication takes 490,699 clock cycles, and the computation time is 1.4 msec at the maximum clock frequency.

• The Transactions of the Korea Information Processing Society
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• v.5 no.9
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• pp.2378-2387
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• 1998

This thesis proposes a design algorithm of an efficient space response compactor for Built-In Self-Testing of VLSI circuits. The proposed design algorithm of space compactors can be applied independently from the structure of Circuit Cnder Test. There are high hardware overhead cost in conventional space response compactors and the fault coverage is reduced by aliasing which maps faulty circuit's response to fault-free one. However, the proposed method designs space response compactors with reduced hardware overheads and does not reduce the fault coverage comparing to conventional method. Also, the proposed method can be extended to general N -input logic gate and design the most efficient space response L'Ompactors according to the characteristies of output sequence from CUT. The prolxlsed design algorithm is implemented by C language on a SUN SPARC Workstation, and some experiment results of the simulation applied to ISCAS'85 benchmark circuits with pseudo random patterns generated bv LFSR( Linear Feedback Shift Register) show the efficiency and validity of the proposed design algorithm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.3
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• pp.296-303
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• 2014

In this paper, we propose an algorithm to visualize radio wave environment based on the measured Received Signal Strength Indication( RSSI) and 3D geographic information. We estimate the source position using the circumcenter of the triangle and visualize the radio wave environment using the empirical propagation models. A mode seeking algorithm(mean-shift clustering) is used to seek the peak points and the center of gravity is utilized to reduce the estimation errors. Our approach finds its applications in the radio wave monitoring systems for the efficient utilization of radio resources.

• Journal of Navigation and Port Research
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• v.36 no.5
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• pp.371-378
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• 2012

This paper presents a timing recovery method using Gardner TED (Timing Error Detector) with a Peak Detector using Parabola Peak Interpolation in underwater acoustic communication. This method will have an eye to improve phase converge speed of timing recovery and reduced amount of Tx data. The OQPSK(Offset Quadrature Phase Shift Keying) modulation technique was considered. The proposed algorithm has faster recovery speed and more accurate than Gardner TED because the sampling values in the proposed algorithm are moved persistingly to maximum or minimum point using parabolic peak interpolation. when simulation performed using Preposed method, it improved BER (Bit Error Rate) performance about 23% And to evaluate the performances of the proposed algorithm the sea trial was performed in the Korean East Sea. And distance of a transmitter-receiver is 3 km each other. As a result, the proposed algorithm outperforms better BER performance about 20% of timing recovery than the Gardner method. Also Proposed method improved converge speed of timing recovery about 1.4 times better than Gardner method.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.10 s.89
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• pp.952-960
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• 2004

PSK(Phase Shift Keying) is useful because of the power and spectral efficient modulation. In this paper, no additional hardware will be needed to support various transmit mode in the suggested DSP scheme. We design and implement the synchronization algorithm for M-ary PSK(M=2, 4) demodulator based on DSP scheme, instead of complex analog PSK demodulator. TMS320C6203 is used as DSP. We check the all kinds of waveforms via the graph view window after software programming the emulation on the DSP tool. The result of implementation proves that demodulator using the suggested algorithm has equal performance with demodulator using analog circuits.