• Title/Summary/Keyword: Settling mode

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Comparison of Nano Particle Size Distributions by Different Measurement Techniques

  • Bae, Min-Suk;Oh, Joon-Seok
    • Journal of Korean Society for Atmospheric Environment
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    • v.26 no.2
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    • pp.219-233
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    • 2010
  • Understanding the Nano size particles is of great interest due to their chemical and physical behaviors such as compositions, size distributions, and number concentrations. Therefore, accurate measurements of size distributions and number concentrations in ultrafine particles are getting required because expected losses such as diffusion for the instrument system from ambient inlet to detector are a significant challenge. In this study, the data using the computed settling losses, impaction losses, diffusion losses for the sampling lines (explored different sampling line diameters, horizontal length, number of bending, line angles, flow rates with and without a bypass), and diffusion losses for the Scanning Mobility Particle Sizers are examined. As expected, the settling losses and impaction losses are very minor under 100 nm, however, diffusion loss corrections for the sampling lines and the size instrument make a large difference for any measurement conditions with high numbers of particles smaller mobility size. Both with and without the loss corrections, which can affect to size distributions and number concentrations are described. First, 80% or more of the smallest particles (less than 10 nm) can be lost in the condition of a flow rate of 0.3 liter per minute and the length of sampling line of 1.0 m, second, total number concentrations of measurements are quite significantly affected, and the mode structure of the size distribution changes dramatically after the loss corrections applied. With compared to the different measurements, statistically diffusion loss corrections yield a required process of the ambient particle concentrations. Based on the current study, as an implication, a possibility of establishing direct revelation mechanisms is suggested.

Seismic Control of Tuned Mass Damper System with MDOF Sliding Mode Control Accounting for the Uncertainties (불확실성을 고려한 동조질량 감쇠기(TMD) 시스템의 다자유도 슬라이딩 모드 지진동 제어)

  • Lee, Jin Ho
    • Journal of the Korea institute for structural maintenance and inspection
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    • v.15 no.1
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    • pp.235-242
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    • 2011
  • The control performance in active structural control system can be drastically deteriorated when the modeling errors and the uncertainties existing in the disturbances are disregarded in the designing stage. It can even throw the control system into an unstable phase, resulting in out of control against the seismic excitations. The purpose of the study is to investigate the control effectiveness of a non-linear control system called sliding mode controller(SMC) in cooperation with a Tuned Mass Damper subjected to the three seismic excitations selected from the FFT analysis. Even though the transient performance such as settling time and overshoot were deteriorated, the robustness against the system stability was appeared from SMC when the structural masses and stiffness perturbed within the range of ${\pm}30%$. SMC is a feasible technique for active structural control in cooperation with TMD against seismic disturbances, exhibiting robustness in perturbation of system stiffness and mass as well as uncertainties of the disturbances.

A 1.248 Gb/s - 2.918 Gb/s Low-Power Receiver for MIPI-DigRF M-PHY with a Fast Settling Fully Digital Frequency Detection Loop in 0.11 ㎛ CMOS

  • Kim, Sang-Yun;Lee, Juri;Park, Hyung-Gu;Pu, Young Gun;Lee, Jae Yong;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.4
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    • pp.506-517
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    • 2015
  • This paper presents a 1.248 Gb/s - 2.918 Gb/s low-power receiver MIPI-DigRF M-PHY with a fully digital frequency detection loop. MIPI-DigRF M-PHY should be operated in a very short training time which is $0.01{\mu}s$ the for HS-G2B mode. Because of this short SYNC pattern, clock and data recovery (CDR) should have extremely fast locking time. Thus, the quarter rate CDR with a fully digital frequency detection loop is proposed to implement a fast phase tracking loop. Also, a low power CDR architecture, deserializer and voltage controlled oscillator (VCO) are proposed to meet the low power requirement of MIPI-DigRF M-PHY. This chip is fabricated using a $0.11{\mu}m$ CMOS process, and the die area is $600{\mu}m{\times}250{\mu}m$. The power consumption of the receiver is 16 mW from the supply voltage of 1.1 V. The measured lock time of the CDR is less than 20 ns. The measured rms and peak jitter are $35.24ps_{p-p}$ and $4.25ps_{rms}$ respectively for HS-G2 mode.

Design and Implementation of a Web-Based Education-Evaluation System for Setting and Analyzing Questions (문항출제와 문항분석이 가능한 웹기반 교육평가 시스템의 설계 및 구현)

  • Ha, Il-Gyu;Gang, Byeong-Uk
    • The KIPS Transactions:PartD
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    • v.9D no.3
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    • pp.511-522
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    • 2002
  • WBI (Web-Based Instruction), a web-based tool for teaching the students at a long distance, makes possible to Interact between learners and instructors, provides a wide variety of learning materials, has an advantage of overcoming spatial constraints. In this paper, as a model of using the web for education, a web-based education-evaluation system has been designed and implemented. Web-based education-evaluation system has to be equipped with both of the online setting question mode and the upload setting question mode, the former makes questions on web and the latter uploads the setted questions on offline with settling a defeat of the existing systems on setting questions. And the system has to be equipped with the function of analyzing the questions that gives teacher several kinds of analysis information and makes possible to feedback to questions by adjusting the difficulty and revising the questions. In this paper, a system that reflects the above requirements has been designed and implemented with PHP script language and MySQL database system.

A Single Inductor Dual Output Synchronous High Speed DC-DC Boost Converter using Type-III Compensation for Low Power Applications

  • Hayder, Abbas Syed;Park, Hyun-Gu;Kim, Hongin;Lee, Dong-Soo;Abbasizadeh, Hamed;Lee, Kang-Yoon
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.1
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    • pp.44-50
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    • 2015
  • This paper presents a high speed synchronous single inductor dual output boost converter using Type-III compensation for power management in smart devices. Maintaining multiple outputs from a single inductor is becoming very important because of inductor the sizes. The uses of high switching frequency, inductor and capacitor sizes are reduced. Owing to synchronous rectification this kind of converter is suitable for SoC. The phase is controlled in time sharing manner for each output. The controller used here is Type-III, which ensures quick settling time and high stability. The outputs are stable within $58{\mu}s$. The simulation results show that the proposed scheme achieves a better overall performance. The input voltage is 1.8V, switching frequency is 5MHz, and the inductor used is 600nH. The output voltages and powers are 2.6V& 3.3V and 147mW &, 230mW respectively.

High Performance Speed Control of Switched Reluctance Motor

  • Song, Byeang-Seab;Yoon, Yong-Ho;Choi, Jun-Hyuk;Kim, Jun-Ho;Won, Chung-Yuen
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.457-461
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    • 2001
  • Advantages of switched reluctance motor(SRM) drives make it an attractive candidate for replacing adjustable speed ac and dc drives in both industrial and consumer applications. Furthermore, a simple, low cost and robust SRM drive can be efficiently operated in the hostile environment of an automobile. Generally, the speed control of SRM has a large step change or large torque reference, the output of its PI controller is often saturated. When this happens, the integral state is not consistent with the SRM input, while may give rise to the windup phenomenon. This paper proposes anti-windup control method for SRM speed control system by hysteresis current controlled asymmetry bridge converter. The experimental results show that the speed response has much improved performance, such as a small overshoot and fast settling time at the acceleration and particulary deceleration period with braking mode.

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Automatic P/PI speed controller design for industry servo drives (산업용 서보 구동 시스템을 위한 자동 P/PI 속도 제어기 설계)

  • Bae, Sang-Gyu;Seok, Jul-Ki;Kim, Kyung-Tae;Lee, Dong-Choon
    • Proceedings of the KIEE Conference
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    • 2003.04a
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    • pp.179-181
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    • 2003
  • Conventional P/PI speed controller of today's servo drives should be manually tuned the controller switching set-point by trial-and-errors, which may translate the drive system down-time and loss of productivity. The adjustable drive performance is heavily dependent on the qualify of the expert knowledge and becomes inadequate in applications where the operating conditions change in a wide range, i.e., tracking command, cceleration/deceleration time, and load disturbances. In this paper, the demands on simple controls/setup are discussed for industry servo drives. Analyzing the frequency content of motor torque command, P/PI control mode switching is automatically peformed with some prior knowledge of the mechanical dynamics. The dynamic performance of the proposed scheme assures a desired tracking response curve with minimal oscillation and settling time over the whole operating conditions. For comprehensive comparison of traditional P/PI control scheme, extensive test is carried out on actual servo system.

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A 1.5 V High-Cain High-Frequency CMOS Complementary Operational Amplifier

  • Park, Kwangmin
    • Transactions on Electrical and Electronic Materials
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    • v.2 no.4
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    • pp.1-6
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    • 2001
  • In this paper, a 1.5 V high-gain high-frequency CMOS complementary operational amplifier is presented. The input stage of op-amp is designed for supporting the constant transconductance on the Input stage by consisting of the parallel-connected rail-to-rail complementary differential pairs. And consisting of the class-AB rail-to-rail output stage using the concept of elementary shunt stage and the grounded-gate cascode compensation technique for improving the low PSRR which was a disadvantage in the general CMOS complementary input stage, the load dependence of open loop gain and the stability of op- amp on the output load are improved, and the high-gain high-frequency operation can be achieved. The designed op-amp operates perfectly on the complementary mode with the 180° phase conversion for a 1.5 V supply voltage, and shows the DC open loop gain of 84 dB, the phase margin of 65°, and the unity gain frequency of 20 MHz. In addition, the amplifier shows the 0.1 % settling time of .179 ㎲ for the positive step and 0.154 ㎲ for the negative step on the 100 mV small-signal step, respectively, and shows the total power dissipation of 8.93 mW.

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Steady-State Integral Proportional Integral Controller for PI Motor Speed Controllers

  • Hoo, Choon Lih;Haris, Sallehuddin Mohamed;Chung, Edwin Chin Yau;Mohamed, Nik Abdullah Nik
    • Journal of Power Electronics
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    • v.15 no.1
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    • pp.177-189
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    • 2015
  • The output of the controller is said to exceed the input limits of the plant being controlled when a control system operates in a non-linear region. This process is called the windup phenomenon. The windup phenomenon is not preferable in the control system because it leads to performance degradation, such as overshoot and system instability. Many anti-windup strategies involve switching, where the integral component differently operates between the linear and the non-linear states. The range of state for the non-overshoot performance is better illustrated by the boundary integral error plane than the proportional-integral (PI) plane in windup inspection. This study proposes a PI controller with a separate closed-loop integral controller and reference value set with respect to the input command and external torque. The PI controller is compared with existing conventional proportional integral, conditional integration, tracking back calculation, and integral state prediction schemes by using ScicosLab simulations. The controller is also experimentally verified on a direct current motor under no-load and loading conditions. The proposed controller shows a promising potential with its ability to eliminate overshoot with short settling time using the decoupling mode in both conditions.

Fluoride removal using Alum & PACl in batch & continuous mode with subsequent microfiltration

  • Dubey, Swati;Agarwal, Madhu;Gupta, A.B.
    • Membrane and Water Treatment
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    • v.12 no.2
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    • pp.83-93
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    • 2021
  • In this study, defluoridation efficiency by aluminium sulphate (alum) and polyaluminium chloride (PACl) were compared for recommended Nalgonda dose (100%) and 80% of this dose in both batch and continuous modes. The residual turbidity was found to be higher in case of alum as compared to PACl with 80% dose representing lesser efficient settling of suspensions, which primarily comprise alumino-fluoro complexes that result in high residual aluminium in the treated water and this was confirmed by TEM and Zeta analysis. Moreover, the application of PACl also resulted in much lesser addition to the TDS and also required lesser lime for pH compensation due to its lower acidity. Hence this reduced dose was recommended for defluoridation. It was also observed that in case of alum, residual aluminium in treated water was 0.88 mg/L (100% dose) & 0.72 mg/L (80% dose) and in case of PACl, it was 0.52 mg/L(100% dose) & 0.41 mg/L(80% dose). After subsequent microfiltration, residual aluminium was 0.28 & 0.21 mg/L for 100% & 80% dose respectively and in case of alum and in case of PACl, it was 0.16 & 0.11 for 100% & 80% dose respectively, which conform to the Al standards(<0.2 mg/L).