• 제목/요약/키워드: Series impedance

검색결과 250건 처리시간 0.024초

A Three-Dimensional Calculation of the Reactor Impedance for Planar-Type Cylindrical Inductively Coupled Plasma Sources

  • Kwon, Deuk-Chul;Yoon, Nam-Sik
    • Applied Science and Convergence Technology
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    • 제24권6호
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    • pp.237-241
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    • 2015
  • The reactor impedance is calculated for a planar-type cylindrical inductively coupled plasma source by expanding the electromagnetic fields into their Fourier-Bessel series forms including the three-dimensional shape of the antenna. The mode excitation method is utilized to determine the electromagnetic fields based on a Poynting theorem-like relationship. From the obtained electromagnetic fields, a tractable form of the reactor impedance is obtained as a function of various plasma and geometrical parameters and applied to carry out a parametric study.

Impact of Fixed Series Capacitors and SSSC on the LOE Protection of Synchronous Generator

  • Ghorbani, Amir;Lima, Hossein Mehryari;Azadru, Allahverdi;Mozafari, Babak
    • Journal of Electrical Engineering and Technology
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    • 제10권4호
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    • pp.1453-1459
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    • 2015
  • Loss of excitation (LOE) relay is prevalently used to protect synchronous generator. The widely used method for synchronous generator LOE protection is a negative offset mho relay with two zones. The basis of this relay is identical to mho impedance relay. In other words, this relay calculates impedance by measuring voltage and current at the generator terminal. On the other hand, the presence of series compensation, changes measured voltage and current signals during loss of excitation. This paper reveals that the presence of series compensators such as fixed series capacitors (FSCs) and static synchronous series compensator (SSSC) causes a significant delay on the performance of generator LOE relay. It is also shown that the presence of SSSC causes the LOE relay to be under-reached. Different operating modes of the power system, the SSSC and also different percentages of series capacitive compensations have been considered in the modeling. All the detailed simulations are carried out in the MATLAB/Simulink environment using the SimPowerSystems toolbox.

Operational Characteristics of Flux-lock Type SFCL using Series Resonance

  • Lim, Sung-Hun;Han, Byoung-Sung;Choi, Hyo-Sang
    • Transactions on Electrical and Electronic Materials
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    • 제6권4호
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    • pp.159-163
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    • 2005
  • We analyzed the fault current limiting characteristics of a flux-lock type $high-T_c$ super­conducting fault current limiter (HTSC-FCL) using series resonance between capacitor for series resonance and magnetic field coil which was installed in coil 3. The capacitor for the series resonance in the flux-lock type HTSC-FCL was inserted in series with the magnetic field coil to apply enough magnetic field into HTSC element, which resulted in higher resistance of HTSC element. However, the impedance of the flux lock type HTSC-FCL has started to decrease since the current of coil 3 exceeded one of coil 2 after a fault accident. The decrease in the impedance of the FCL causes the line current to increase and, if continues, the capacitor for the series resonance to be destructed. To avoid this operation, the flux-lock type HTSC-FCL requires an additional device such as fault current interrupter or control circuit for magnetic field. From the experimental results, we investigated the parameter range where the operation as mentioned above for the designed flux-lock type HTSC-FCL using series resonance occurred.

Modified Transmission Line Protection Scheme in the Presence of SCC

  • Naeini, Ehsan Mostaghimi;Vaseghi, Behrouz;Mahdavian, Mehdi
    • Journal of Electrical Engineering and Technology
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    • 제12권2호
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    • pp.533-540
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    • 2017
  • Distance relay identifies the type and location of fault by measuring the transmission line impedance. However any other factors that cause miss calculating the measured impedance, makes the relay detect the fault in incorrect location or do not detect the fault at all. One of the important factors which directly changes the measured impedance by the relay is series capacitive compensation (SCC). Another factor that changes the calculated impedance by distance relay is fault resistance. This paper provides a method based on the combination of distance and differential protection. At first, faulty transmission line is detected according to the current data of buses. After that the fault location is calculated using the proposed algorithm on the transmission line. This algorithm is based on active power calculation of the buses. Fault resistance is calculated from the active powers and its effect will be deducted from calculated impedance by the algorithm. This method measures the voltage across SCC by phasor measurement units (PMUs) and transmits them to the relay location via communication channels. The transmitted signals are utilized to modify the voltage signal which is measured by the relay. Different operating modes of SCC and as well as different faults such as phase-to-phase and phase-to-ground faults are examined by simulations.

GaAs MESFET의 소오스 및 부하 임피던스가 선형성에 미치는 영향 (Effects of Source and Load Impedance on the Linearity of GaAs MESFET)

  • 안광호;이승학;정윤하
    • 한국전자파학회논문지
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    • 제10권5호
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    • pp.663-671
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    • 1999
  • 본 연구에서는 GaAs MESFET의 게이트-소오스 캐패시턴스($C_{gs}$)와 드레인-소오스 전류($I_{ds}$)의 비션형성에 의한 이득감소(Gain Compression) 및 위상왜곡(Phase Distortion)특성을 알아보고, 이를 최소화 할 수 있 는 소오스 및 부하 임피던스의 조건에 대해 조사하였다. 먼저 Volterra - Series 분석을 통하여, $C_{gs}(V_{gs})$$I_{ds}(V_{gs})$의 비선형특성을 조사하고, 각각의 비선형성분이 상호 소멸되는 소오스 및 부하 임피던스의 조건에서, 전체소자의 비선형성이 최소화 됨을 얄아보았다. 그리고 소오스 및 부하측정(Source, Load Pull)을 통하여 출 력전력값에 따라 최적의 선형성이 나오는 입출력 임피던스값을 찾고, Volterra-Series에서 구한 이론적인 결과와 비교 및 분석을 행하였다.

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UWB 타원형 슬롯 안테나의 설계 및 해석 (Design and Analysis of UWB Elliptical Slot Antenna)

  • 장준원;최경;황희용
    • 한국정보통신설비학회:학술대회논문집
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    • 한국정보통신설비학회 2007년도 학술대회
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    • pp.419-422
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    • 2007
  • This paper, designed UWB elliptical slot antenna and analysis based on the distribution of the electromagnetic fields pattern and resonant mode of designed antenna is presented. Designed antenna is fabricated on FR4 substrate with thickness of 1.524mm and relative dielectric constant 4.4. The measured bandwidth of $3.6GHz{\sim}20GHz$ for VSWR<2. Through the field pattern and resonant mode analysis that the slot antenna operates on a series of the multi-pole radiation based on TE modes matched to system impedance. And the perfect magnetic wall is along the axis of symmetry on the y-z plane. This result gives us an easier method to design the similar antennas, which is the impedance matching to the system impedance after once constructing a proper structure with a series of multi-mode resonances.

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직병렬 임피던스 보상을 통한 계통 연계 분산전원 인버터의 PCC 무효전력 제어 알고리즘 (Reactive Power Control Algorithm of Grid-Connected Inverter at the Point of Common Coupling With Compensation of Series and Parallel Impedances)

  • 허철영;송승호;김용래
    • 전력전자학회논문지
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    • 제27권2호
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    • pp.92-99
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    • 2022
  • Due to space and geographical constraints, the power source may be located outside the island area, resulting in the considerable length of transmission line. In these cases, when an active power is transmitted, unexpected reactive power is generated at a point of common coupling (PCC). Unlike the power transmitted from the power generation source, the reactive power adversely affects the system. This study proposes a new algorithm that controls reactive power at PCC. Causes of reactive power errors are separated into parallel and series components, which allows the algorithm to compensate the reactive current of the inverter output and control reactive power at the PCC through calculations from the impedance, voltage, and current. The proposed algorithm has economic advantages by controlling the reactive power with the inverter of the power source itself, and can flexibly control power against voltage and output variations. Through the simulation, the algorithm was verified by implementing a power source of 3 [kVA] capacity connected to the low voltage system and of 5 [MVA] capacity connected to the extra-high voltage system. Furthermore, a power source of 3 [kVA] capacity inverter is configured and connected to a mock grid, then confirmed through experiments.

자기단 전원 임피던스 추정 기법을 사용한 병행 2회선 송전선로 고장점 표정 알고리즘 (A Fault Location Algorithm Using Adaptively Estimated Local Source Impedance for a Double-Circuit Transmission Line System)

  • 박건호;강상희;김석일;신종한
    • 전기학회논문지
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    • 제61권3호
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    • pp.373-379
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    • 2012
  • This paper presents a fault location algorithm based on the adaptively estimated value of the local sequence source impedance for faults on a parallel transmission line. This algorithm uses only the local voltage and current signals of a faulted circuit. The remote current signals and the zero-sequence current of the healthy adjacent circuit are calculated by using the current distribution factors together with the local terminal currents of the faulted circuit. The current distribution factors consist of local equivalent source impedance and the others such as fault distance, line impedance and remote equivalent source impedance. It means that the values of the current distribution factors can change according to the operation condition of a power system. Consequently, the accuracy of the fault location algorithm is affected by the two values of equivalent source impedances, one is local source impedance and the other is remote source impedance. Nevertheless, only the local equivalent impedance can be estimated in this paper. A series of test results using EMTP simulation data show the effectiveness of the proposed algorithm. The proposed algorithm is valid for a double-circuit transmission line system where the equivalent source impedance changes continuously.

가변 병렬 터미네이션을 가진 단일 출력 송신단 (A Single-Ended Transmitter with Variable Parallel Termination)

  • 김상훈;어지훈;장영찬
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2010년도 춘계학술대회
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    • pp.490-492
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    • 2010
  • Center-tapped termination을 가진 stub series-termination logic (SSTL) 채널을 지원하기 위한 전압모드 송신단을 제안한다. 제안하는 송신단은 진단 모드를 지원하고 신호보전성을 향상시키기 위해 출력레벨 조절수단을 가지며, 가변 병렬 터미네이션을 사용하여 swing level을 조절하는 동안 송신단의 출력 저항을 일정하게 유지시켜준다. 또한 제안하는 송신단의 off-chip 저항은 기생 캐패시터, 인덕터에 의한 termination의 임피던스 부정합을 줄여준다. 제안된 송신단을 검증하기 위해서 $50{\Omega}$의 출력저항을 유지하면서 8-레벨의 출력을 제공하는 전압모드 송신단을 1.5V의 70nm 1-poly 3-metal DRAM공정을 이용하여 구현하였다. 수신단 termination이 존재하지 않는 SSTL 채널에서 제안하는출력레벨 조절이 가능한 송신단을 이용함으로 1.6-Gb/s에서 54%의 jitter 감소가 측정되었다.

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임피던스 측정법을 이용한 단결정태양전지의 성능 특성 분석 (Performance Analysis of Single Crystal Solar Cell by Impedance Measurement)

  • 정유라;최용성;황종선;이경섭
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.202-202
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    • 2010
  • This study focused on the characteristics of single crystal solar cell using the impedance technique. In this experiment, the impedance was measured according to frequency's from 1mHz until 2MHz. The solar cell is R-L-C series circuit. Capacitance reactance was changed according to changing from low frequency to high frequency. It could know that the impedance was changed according to the frequency increases in solar cell.

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