• 제목/요약/키워드: Sequence simulation

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Comparative Analysis of Sequence Control in Six Series-Connected ITER VS Converters (6 직렬 연결된 ITER VS 컨버터의 시퀀스제어 비교 해석)

  • Jo, Hyunsik;Jeong, Jinyong;Jo, Jongmin;Cha, Hanju
    • The Transactions of the Korean Institute of Power Electronics
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    • v.19 no.5
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    • pp.399-406
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    • 2014
  • This study investigates the structure and operation of the ITER VS converter and proposes a sequence control method for six series-connected VS converters to reduce reactive power. The operation and the proposed sequence control method are verified through RTDS simulation. The ITER VS converter must supply voltage/current to the superconducting magnets for plasma current vertical stabilization, and the four-quadrant operation must proceed without a zero-current discontinuous section. The operation mode of the VS converter is separated into a 12- and 6-pulse circulating current and transition modes according to the size of the load current. The output voltage of the unit VS converter is limited because of the rated voltage; however, the superconducting coil must increase the operating output voltage. Thus, the VS converter must be connected in a 6-series to provide the required operating output voltage. The output voltage of the VS converters is controlled continuously; however, reactive power is limited within a minimized value of the grid. In this study, the unit converter is compared with converters connected in a 6-series to determine a suitable sequence control method. The output voltage is the same in all cases, but the maximum reactive power is reduced from 100% to 73%. This sequence control method is verified through RTDS simulation.

Hierarchical 3D Sgmentation of Image Sequence Using Motion Information Based on Mathematical Morphology (수리 형태학 기반의 움직임 정보를 이용한 연속영상의 계층적 3차원 분할)

  • 여영준;송근원;박영식;김기석;하영호
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.34S no.7
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    • pp.78-88
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    • 1997
  • A three dimensional-two spatical dimensions plus time-image segmentation is widely used in a very low bit rate image sequence coding because it can solve the region correspondence problem. Mathematical morphology is a very efficient tool for the segmentation because it deals well with geometric features such as size, shape, contrast and connectivity. But if the motion in the image sequence is large in time axis, the conventional 3D morphological segmentation algorithm have difficulty in solving region correspondence problem. To alleviate this problem, we propose the hierarchical image sequence segmentation algorithm that uses the region motion information. Since the motion of a region in previous level affects that in current level uses the previous motion information to increase region correspondence. Simulation result shows improved performance for sequence frames with large motion.

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An Integrated Compensation Algorithm for PCC Voltage Fluctuation and Unbalance with Variable Limit of Positive and Negative Sequence Currents

  • Im, Ji-Hoon;Song, Seung-Ho;Cho, Sung-Min
    • Journal of Electrical Engineering and Technology
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    • v.12 no.2
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    • pp.751-760
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    • 2017
  • This paper proposes a point of common coupling (PCC) voltage compensation algorithm using a current limitation strategy for use in distributed generation (DG). The proposed strategy maintains the PCC voltage by prioritizing currents when an output current reference is larger than the current capacity of the power condition system (PCS) of the DG. With this strategy, the DG outputs the active current, reactive current, and the negative sequence current. The DG uses the reactive current for maintaining the PCC voltage within a normal range; the negative sequence current is used for reducing the PCC voltage unbalance. The proposed method was verified using PSIM simulation and experimental results.

A Study on the Process Sequence Design of a Short-Neck Flange (숏넥 플랜지의 공정설계에 관한 연구)

  • 장용석;최진화;고병두;이호용;황병복
    • Journal of the Korean Society for Precision Engineering
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    • v.17 no.6
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    • pp.127-134
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    • 2000
  • The current three-stage cold farming process to produce a flange is investigated for the purpose of improvement of manufacturing process. The main goal of this study is to obtain an appropriate process sequence, which can produce the required part with less manufacturing cost. The current process sequence is simulated using finite element method and design criteria are examined. Based on the results of simulation of the current three-stage process. a design strategy for improving the process sequence is analyzed using the thick-walled pipes. Because it has a reduced process-sequence without buckling of the workpiece or overloading of tools, the new process has distinct advantages over the conventional process. Numerical results show that the newly proposed process with selected presses is the most economical way to produce the required part.

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VPI-based Control Strategy for a Transformerless MMC-HVDC System Under Unbalanced Grid Conditions

  • Kim, Si-Hwan;Kim, June-Sung;Kim, Rae-Young;Cho, Jin-Tae;Kim, Seok-Woong
    • Journal of Electrical Engineering and Technology
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    • v.13 no.6
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    • pp.2319-2328
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    • 2018
  • This paper introduces a control method for a transformerless MMC-HVDC system. The proposed method can effectively control the grid currents of the MMC-HVDC system under unbalanced grid conditions such as a single line-to-ground fault. The proposed method controls the currents of the positive sequence component and the negative sequence component without separating algorithms. Therefore, complicated calculations for extracting the positive sequence and the negative sequence component are not required. In addition, a control method to regulate a zero sequence component current under unbalanced grid conditions in the transformerless MMC-HVDC system is also proposed. The validity of the proposed method is verified through PSCAD/EMTDC simulation.

A Study on the Detection of Unbalanced Voltages for Instantaneous Voltage Compensation (순시전압 보상을 위한 불평형 전압 검출기법에 관한 연구)

  • Jeong, Hong-Ju;Choe, Si-Yeong;Jeong, Jun-Mo;Song, Jong-Hwan
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.51 no.4
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    • pp.203-209
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    • 2002
  • This paper presents a new control scheme for a DVR(Dynamic Voltage Restorer) system consisting of series voltage source PWM converters. To control negative sequence component of source voltage the detection of negative sequence is necessary. Generally, filtering process is used tn do that. Through this filtering process has some problems. This paper suggests a new method of separating positive and negative sequences. This control system is designed using differential controllers and digital filters, and positive sequence and negative sequences are controlled respectively. The performance of the presented controller and scheme are confirmed through simulation and actual experiment by 2.5kVA prototype DVR.

RATE-DISTORTION OPTIMAL BIT ALLOCATION FOR HIGH DYNAMIC RANGE VIDEO COMPRESSION

  • Lee, Chul;Kim, Chang-Su
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2009.01a
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    • pp.207-210
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    • 2009
  • An efficient algorithm to compress high dynamic range (HDR) videos is proposed in this work. We separate an HDR video sequence into a tone-mapped low dynamic range (LDR) sequence and a ratio sequence. Then, we encode those two sequences using the standard H.264/AVC codec. During the encoding, we allocate a limited amount of bit budget to the LDR sequence and the ratio sequence adaptively to maximize the qualities of both the LDR and HDR sequences. While a conventional LDR decoder uses only the LDR stream, an HDR decoder can reconstruct the HDR video using the LDR stream and the ratio stream. Simulation results demonstrate that the proposed algorithm provides higher performance than the conventional methods.

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Process Sequence Design of Longneck Flange by Cold Extrusion Process (냉간압출을 이용한 롱넥 플랜지 성형에 대한 공정설계)

  • 임중연;황병복;김철식
    • Transactions of Materials Processing
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    • v.8 no.2
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    • pp.160-168
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    • 1999
  • This paper is concerned with the process sequence design of longneck flange forming by using cold extrusion with thick hollow pipe. The conventional hot forming process to produce a longneck flange is investigated by thermo-viscoplastic finite element method to observe the metal flow in detail and evaluate design requirements. Based on the results of simulation of the current hot forming process, design strategy for improving the process sequence are developed using the thick hollow pipe. The main goal is to obtain an appropriate improved process sequence which can produce the required product most economically without tensile cracking, workpiece buckling, and overloading of tools. Newly process condition such as semi-die angle, reductio ratio of cross-sectional area of axisymmetrical extrusion process. The final designed process can provide very useful guidelines to other flange forming industries.

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Adaptive SLM Scheme Based on Peak Observation for PAPR Reduction of OFDM Signals (OFDM PAPR 감소를 위한 피크 신호 관찰 기반의 적응적 SLM 기법)

  • Yang, Suck-Chel;Shin, Yoan
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.15-16
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    • 2006
  • In this paper, we propose an adaptive SLM scheme based on peak observation for PAPR reduction of OFDM signals. The proposed scheme is composed of three steps: peak scaling, sequence selection, and SLM procedures. In the first step, the peak signal samples in the IFFT outputs of the original input sequence are scaled down. In the second step, the sub-carrier positions where power difference between the original input sequence and the FFT outputs of the scaled signal is large, are identified. Then, the phase sequences which have the maximum number of phase-reversed sequence words only for these positions, are selected. Finally, only using the selected phase sequences, the generic SLM procedure is performed for the original input sequence. Simulation results reveal that the proposed adaptive SLM remarkably reduces the complexity in terms of IFFT and PAPR calculations than the conventional SLM, while maintaining the PAPR reduction performance.

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Current Distribution Factor Based Fault Location Algorithms for Double-circuit Transmission Lines (전류분배계수를 사용하는 병행 2회선 송전선로 고장점 표정 알고리즘)

  • Ahn, Yong-Jin;Kang, Sang-Hee;Choi, Myeon-Song;Lee, Seung-Jae
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.50 no.3
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    • pp.146-152
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    • 2001
  • This paper describes an accurate fault location algorithm based on sequence current distribution factors for a double-circuit transmission system. The proposed method uses the voltage and current collected at only the local end of a single-circuit. This method is virtually independent of the fault resistance and the mutual coupling effect caused by the zero-sequence current of the adjacent parallel circuit and insensitive to the variation of source impedance. The fault distance is determined by solving the forth-order KVL(Kirchhoff's Voltage Law) based distance equation. The zero-sequence current of adjacent circuit is estimated by using a zero-sequence current distribution factor and the zero-sequence current of the self-circuit. Thousands of fault simulation by EMTP have proved the accuracy and effectiveness of the proposed algorithm.

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