• Korean Journal of Computational Design and Engineering
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• v.18 no.6
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• pp.417-427
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• 2013

Assembly direction is used in order to confirm the generated assembly sequences in an automatic assembly sequence planning system. Moreover, assembly sequence planners can ascertain the feasibility of a sequence during simulation with assembly direction based in a CAD environment. In other words, assembly direction is essential for sequence optimizing and automatic generation. Based on the importance of assembly direction, this paper proposes a method to select the best direction for the generated assembly sequence using disassembly simulation and geometrical common area between assembled parts. Simultaneously, this idea can be applied to verify the generated assembly sequence. In this paper, the automatic selection of assembly direction and sequence correction system is designed and implemented. The developed algorithms and the implemented system are verified based on case study in the CAD environment.

• Journal of the Korea Society for Simulation
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• v.25 no.3
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• pp.133-146
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• 2016

To engage multiple missiles in single launcher against multiple targets, launcher system has to operate for optimized launch angle to each target sequentially. If the launch angle sequence is simply defined according to the target assignment order only, overall engagement time would be increased, and even in some engagement scenarios, it could be possible to miss some moving targets being out of proper engagement area. Therefore, the study on methodology for a real-time decision of optimized launch angle sequence is necessary. In this paper, the automatic decision model of launch angle sequence was suggested to minimize total engagement time by analyzing the simulation results of all engagement sequence set for multiple moving target scenario. Performance of proposed methodology for decision of optimal launch angle sequence was verified by comparing with the optimal or suboptimal sequence obtained from simulation results.

• Journal of KIISE:Software and Applications
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• v.36 no.6
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• pp.443-450
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• 2009

In an earlier development phase, the simulation technique is one of the key analysis methods for checking the correctness of system's functional requirements. In general, simulation is manually or randomly performed by executing state machine diagrams according to the requirement scenarios. Therefore, simulation is one of the most effort-consuming tasks. In this paper, an automatic simulation technique of state machine diagrams is provided according to the scenarios of the sequence diagrams. It is not easy to generate detailed simulation traces from sequence diagrams due to different abstraction levels between sequence diagrams and state machine diagrams. In order to adjust for different abstraction levels, state machine diagrams and sequence diagrams are transformed into LTS models and compositional analysis and transition reduction are performed. After checking behavior conformance between them, detailed simulation traces for the state machine diagrams are generated. These simulation traces are used not only for performing automatic simulation but also for assisting analyzers to reach a specific system state in order to guide further efficient simulation.

• Transactions of Materials Processing
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• v.3 no.3
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• pp.359-374
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• 1994

Process sequence design in sheet metal forming process by the finite element method is investigated. The forming of sheet metal into a washing machine container is used to demonstrate the design of an improved process sequence which has fewer operations. The design procedure makes extensive use of the finite element method which has simulation capabilities of elastic-plastic modeling. A one-stage process to make an initial blank to the final product is simulated to obtain information on metal flow requirements. Loading simulation for a conventional method is also performed to evaluate the design criteria which are uniform thickness distribution around the finished part and maximum punch load within limit of available press capacity. The newly designed sequence has two forming operations and can achieve net-shape manufacturing, while the conventional process sequence has three forming operations. This specific case conventional process sequence has three forming operations. This specific case can be considered for application of the method and for development of the sequence design methodology in general.

• Journal of Information Processing Systems
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• v.19 no.3
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• pp.370-376
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• 2023

Aiming at the problems of low image enhancement accuracy, long enhancement time and poor image quality in the traditional robot sequence motion image enhancement methods, an adaptive enhancement method for robot sequence motion image is proposed. The feature representation of the image was obtained by Karhunen-Loeve (K-L) transformation, and the nonlinear relationship between the robot joint angle and the image feature was established. The trajectory planning was carried out in the robot joint space to generate the robot sequence motion image, and an adaptive homomorphic filter was constructed to process the noise of the robot sequence motion image. According to the noise processing results, the brightness of robot sequence motion image was enhanced by using the multi-scale Retinex algorithm. The simulation results showed that the proposed method had higher accuracy and consumed shorter time for enhancement of robot sequence motion images. The simulation results showed that the image enhancement accuracy of the proposed method could reach 100%. The proposed method has important research significance and economic value in intelligent monitoring, automatic driving, and military fields.

• Transactions of Materials Processing
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• v.4 no.1
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• pp.28-38
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• 1995

An integrated process planning system can determine desirable operation sequences even if they have little experience in the design of multistage cold forging process. This system is composed of seven major modules such as input module, pre-design module, formability check module, forming sequence design module, forming analysis module, FEM verification module, and output module which are used independently or in all. The forming sequence for the part can be determined by means of primitive geometries such as cylinder, cone, convex, and concave. By utilizing this geometrical characteristics(diameter, height, and radius), the part geometry is expressed by a list of the primitive geometries. Accordingly, the forming sequence design is formulated as the search problem which starts with a billet geometry and finishes with a given product one. Using the developed system, the sequence drawing with all dimensions, which includes the dimensional tolerances and the proper sequence of operations for parts, is generated under the environment of AutoCAD. Several forming sequences generated by the planning system can be checked by the forming analysis module. The acceptable forming sequences can be verified further, using FE simulation.

• Journal of the Korea Institute of Military Science and Technology
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• v.11 no.5
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• pp.23-33
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• 2008

In this paper, we verify the performance of LDPC coded OFDM/DS system by Monte-Carlo simulation of BER on Eb/No. The simulation results show that LDPC coded OFDM/DS has a strong anti-jamming characteristic over pulse-noise jammer and partial-band noise jammer. The performance of LDPC coded OFDM/DS system is evaluated on both faded waveforms and non-faded waveforms. For non-faded waveforms, high coding gain is attained due to LDPC, even when waveforms have short PN sequence and JSR is only 5dB. Especially, the increase in the repeated number of LDPC decoding enhances coding gain. However, faded waveforms cannot achieve sufficient average effect when PN sequence is short. High coding gain of faded waveforms can be achieved by extending length of PN sequence. In addition, we compare LDPC coded OFDM/DS system with Convolutional coded OFDM/DS system. The simulation results illustrate that when LDPC coded OFDM/DS system with short PN sequence has sufficient average effects, the system shows lower BER than Convolutional coded OFDM/DS system with long PN sequence.

• Proceedings of the KIPE Conference
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• 2016.11a
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• pp.143-144
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• 2016

The circulating current control within the phase legs is one of the main control objectives in a modular multilevel converter (MMC) under different operating conditions. This paper proposes a control strategy of circulating currents in the MMC under unbalanced voltage by using a proportional-resonant (PR) controller. Under the unbalanced voltage, the circulating currents in the MMC consists of three components such as positive-sequence, negative-sequence, and zero-sequence circulating currents. With the PR controller, all components of the circulating current will be directly controlled in the stationary reference frame without decomposing into positive- and negative-sequence components. Thus, the ripples in the circulating currents and the DC current are suppressed under the unbalanced voltage. The effectiveness of the proposed method is verified by simulation results based on PSCAD/EMTDC simulation program.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.6
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• pp.105-114
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• 1984

A fast pseudo-noise (PN) sequence acquisition algorithm for the direct-sequence (DS) spread spectrum system is proposed. The basic concept of the algorithm has been adopted from that of the classical sliding correlator. Mathematical modeling, analysis and computer simulation of the proposed system have been done. The results of analysis and computer simulation show that the acquisition system yields a significant performance improvement over the sliding correlator. Its acquisition time takes only 45 ms when signal-to-noise ratio(SNR) is -18dB. The algorithm developed has been implemented in hardware and its experimental result is also given.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.12
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• pp.1554-1563
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• 1999

This paper presents the design of high speed processor for a sequence logic control using field programmable gate array(FPGA). The sequence logic controller is widely used for automating a variety of industrial plants. The FPGA designed by VHDL consists of program and data memory interface block, input and output block, instruction fetch and decoder block, register and ALU block, program counter block, debug control block respectively. Dedicated clock inputs in the FPGA were used for high speed execution, and also the program memory was separated from the data memory for high speed execution of the sequence instructions at 40 MHz clock. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. In order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 16 bits or 32 bits respectively. And the real time debug operation was implemented for easy debugging the designed processor. This FPGA was synthesized by pASIC 2 SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to sequence control system with inputs and outputs of 256 points. The designed processor for the sequence logic was compared with the control system using the DSP(TM320C32-40MHz) and conventional PLC system. The designed processor for the sequence logic showed good performance.