• Title/Summary/Keyword: Semiconductor manufacturing

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A Study on the Solution of Product Particle Attachment Problem using Practical TRIZ (실용 트리즈를 활용한 제품 Particle 부착 문제의 해결 방안 연구)

  • Kyu-Han Jeong;In-Kwang Song;Jang-Hee Lee
    • Journal of Practical Engineering Education
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    • v.15 no.1
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    • pp.209-221
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    • 2023
  • In the external inspection and packaging stages of products used in the semiconductor manufacturing process, there is a problem in which particles are adsorbed to the product itself or a carrying tool due to electrostatic discharge. This study presents a methodology that can improve the problem of adsorption of particles to a product by using a practical TRIZ technique. By applying the proposed practical TRIZ-based methodology, the problem was defined, and contradictions caused by product waiting time were derived. Among the derived contradictions, physical contradictions were set and the concept of 'space separation' was applied to derive solutions such as 'installation of Ionizer' and 'improvement of the layout of the workroom'. As a result of the experiment by applying 'Ionizer Installation' and 'Workroom Layout Improvement' derived through the application of practical TRIZ, it was confirmed that the particle adsorption problem that occurs during the waiting time of the product can be solved.Through this study, it is expected that workers, facility engineers, and technical engineers working at manufacturing processes will be able to effectively solve the problems they face through creative thinking and change of ideas by using practical TRIZ techniques, and contribute to innovative technology development and productivity improvement.

Study on Shift of Innovation and Manufacturing Hubs to the United States (혁신 및 제조 허브의 미국으로 이동에 관한 연구)

  • Seo, Daesung
    • The Journal of the Convergence on Culture Technology
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    • v.9 no.2
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    • pp.553-560
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    • 2023
  • The study is about domestic industries following the migration of hubs (innovation, manufacturing) to other countries and the hub-oriented US industries (batteries, semiconductors, electric vehicles). Additionally, the ongoing trade tensions between the United States and China may have also played a role in companies moving their operations to the United States. The result of such a move could potentially include job creation in the United States, as well as increased investment in the U.S. manufacturing sector. However, it is also possible that there could be negative consequences, such as higher prices for consumers or disruptions to supply chains during the relocation process. However, such IRA, Chips Act scenario would likely also have negative consequences (Inflation in the home country) for the countries whose industries moved to the US, as they would lose jobs, investment, and possibly face economic difficulties as a result. As the result of the empirical analysis of the export scale of Korea and the United States, changes in the movement of global supply hubs are related to factors such as geopolitical price increases and consumption declines. In order to respond to these changes, this paper emphasizes the need to prevent the result of de-advantage by moving the production area of the scale.

Warpage Analysis during Fan-Out Wafer Level Packaging Process using Finite Element Analysis (유한요소 해석을 이용한 팬아웃 웨이퍼 레벨 패키지 과정에서의 휨 현상 분석)

  • Kim, Geumtaek;Kwon, Daeil
    • Journal of the Microelectronics and Packaging Society
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    • v.25 no.1
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    • pp.41-45
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    • 2018
  • As the size of semiconductor chip shrinks, the electronic industry has been paying close attention to fan-out wafer level packaging (FO-WLP) as an emerging solution to accommodate high input and output density. FO-WLP also has several advantages, such as thin thickness and good thermal resistance, compared to conventional packaging technologies. However, one major challenge in current FO-WLP manufacturing process is to control wafer warpage, caused by the difference of coefficient of thermal expansion and Young's modulus among the materials. Wafer warpage induces misalignment of chips and interconnects, which eventually reduces product quality and reliability in high volume manufacturing. In order to control wafer warpage, it is necessary to understand the effect of material properties and design parameters, such as chip size, chip to mold ratio, and carrier thickness, during packaging processes. This paper focuses on the effects of thickness of chip and molding compound on 12" wafer warpage after PMC of EMC using finite element analysis. As a result, the largest warpage was observed at specific thickness ratio of chip and EMC.

Effects of Form Errors of a Micromirror Surface on the Optical System of the TMATM(Thin-film Micromirror ArrayTM) Projector

  • Jo, Yong-Shik;Kim, Byoung-Chang;Kim, Seung-Woo;Hwang, Kyu-Ho
    • International Journal of Precision Engineering and Manufacturing
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    • v.1 no.1
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    • pp.98-105
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    • 2000
  • The projectors using liquid crystal display(LCD) have faults such as low optical efficiency, low brightness and even heat generation. To solve these problems reflective-type spatial light modulators based on MEMS (Microelectromechanical Systems) technology have emerged. Digital Micromirror DeviceTM(DMDTM), which was already developed by Texas Instruments Inc., and Thin-film Micromirror ArrayTM(TMATM), which has been recently developed by Daewoo Electronics Co., are the representative examples. The display using TMATM has particularly much higher optical efficiency than other projectors. But the micromirrors manufactured by semiconductor processes have inevitable distortion because of the limitations of the manufacturing processes, so that the distortions of their surfaces have great influence on the optical efficiency of the projector. This study investigated the effects of mirror flatness on the optical performance, including the optical efficiency, of the TMATM projector. That is to say, as a part of the efforts to enhance the performance of the TMATM projector, how much influence the form errors of a micromirror surface exert on the optical efficiency and the modulation of gray scale of the projector were analyzed through a pertinent modeling and simulations.

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What Is the Key Vacuum Technology for OLED Manufacturing Process?

  • Baek, Chung-Ryeol
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.95-95
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    • 2014
  • An OLED(Organic Light-Emitting Diode) device based on the emissive electroluminescent layer a film of organic materials. OLED is used for many electronic devices such as TV, mobile phones, handheld games consoles. ULVAC's mass production systems are indispensable to the manufacturing of OLED device. ULVAC is a manufacturer and worldwide supplier of equipment and vacuum systems for the OLED, LCD, Semiconductor, Electronics, Optical device and related high technology industries. The SMD Series are single-substrate sputtering systems for deposition of films such as metal films and TCO (Transparent Conductive Oxide) films. ULVAC has delivered a large number of these systems not only Organic Evaporating systems but also LTPS CVD systems. The most important technology of thin-film encapsulation (TFE) is preventing moisture($H_2O$) and oxygen permeation into flexible OLED devices. As a polymer substrate does not offer the same barrier performance as glass substrate, the TFE should be developed on both the bottom and top side of the device layers for sufficient lifetimes. This report provides a review of promising thin-film barrier technologies as well as the WVTR(Water Vapor Transmission Rate) properties. Multilayer thin-film deposition technology of organic and inorganic layer is very effective method for increasing barrier performance of OLED device. Gases and water in the organic evaporating system is having a strong influence as impurities to OLED device. CRYO pump is one of the very useful vacuum components to reduce above impurities. There for CRYO pump is faster than conventional TMP exhaust velocity of gases and water. So, we suggest new method to make a good vacuum condition which is CRYO Trap addition on OLED evaporator. Alignment accuracy is one of the key technologies to perform high resolution OLED device. In order to reduce vibration characteristic of CRYO pump, ULVAC has developed low vibration CRYO pumps to achieve high resolution alignment performance between Metal mask and substrate. This report also includes ULVAC's approach for these issues.

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Development of Three D.O.F Alignment Stage for Vacuum Environment (진공용 3자유도 얼라인먼트 스테이지 개발)

  • Han, Sang-Jin;Park, Jong-Ho;Park, Hui-Jae
    • Journal of the Korean Society for Precision Engineering
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    • v.18 no.11
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    • pp.138-147
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    • 2001
  • Alignment systems are frequently used under various semiconductor manufacturing environment. Particularly in PDP(Plasma Display Panel) manufacturing process, the alignment system is applied to the combining and sealing processes of the upper and lower glass panels of PDP, where these processes are performed in the vacuum chamber of high vacuum and high temperature. In this paper, the XYΘ-alignment stage is developed to align PDP panels. Because of high vacuum and high temperature environment, the alignment chamber has been designed to isolate the inner part of the alignment chamber from the outer environment of high vacuum and high temperature, in which every part of the alignment stage is inserted. As it is difficult to attach feedback sensors to the alignment stage in the alignment chamber, the alignment stage is implemented with the open loop algorithm, where the parallel link structure has been designed using step-motors and ball-screws for structural simplicity. The kinematic analysis is performed to drive the parallel link structure, based on the experiments of actuation-compensation of the alignment stage. For the error compensation, the hyperpatch model has been used to model the errors. From the experiments, the positional accuracy of the alignment stage can be improved significantly.

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Technical Tasks and Development Current Status of Organic Solar Cells (유기 태양전지의 개발 현황과 기술 과제)

  • Jang, Ji Geun;Park, Byung Min;Lim, Sungkyoo;Chang, Ho Jung
    • Korean Journal of Materials Research
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    • v.24 no.8
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    • pp.434-442
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    • 2014
  • Serious environmental problems have been caused by the greenhouse effect due to carbon dioxide($CO_2$) or nitrogen oxides($NO_x$) generated by the use of fossil fuels, including oil and liquefied natural gas. Many countries, including our own, the United States, those of the European Union and other developed countries around the world; have shown growing interest in clean energy, and have been concentrating on the development of new energy-saving materials and devices. Typical non-fossil-fuel sources include solar cells, wind power, tidal power, nuclear power, and fuel cells. In particular, organic solar cells(OSCs) have relatively low power-conversion efficiency(PCE) in comparison with inorganic(silicon) based solar cells, compound semiconductor solar cells and the CIGS [$Cu(In_{1-x}Ga_x)Se_2$] thin film solar cells. Recently, organic cell efficiencies greater than 10 % have been obtained by means of the development of new organic semiconducting materials, which feature improvements in crystalline properties, as well as in the quantum-dot nano-structure of the active layers. In this paper, a brief overview of solar cells in general is presented. In particular, the current development status of the next-generation OSCs including their operation principle, device-manufacturing processes, and improvements in the PCE are described.

An efficient algorithm for scheduling parallel machines with multiple servers (다중 서버를 사용하는 병렬 머신 스케줄링을 위한 효율적인 알고리즘)

  • Chong, Kyun-Rak
    • Journal of the Korea Society of Computer and Information
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    • v.19 no.6
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    • pp.101-108
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    • 2014
  • The parallel machine scheduling is to schedule each job to exactly one parallel machine so that the total completion time is minimized. It is used in various manufacturing system areas such as steel industries, semiconductor manufacturing and plastic industries. Each job has a setup phase and a processing phase. A removal phase is needed in some application areas. A processing phase is performed by a parallel machine alone while a setup phase and a removal phase are performed by both a server and a parallel machine simultaneously. Most of previous researches used a single server and considered only a setup phase and a processing phase. If a single server is used for scheduling, the bottleneck in the server increases the total completion time. Even though the number of parallel machines is increased, the total completion time is not reduced significantly. In this paper, we have proposed an efficient algorithm for the parallel machine scheduling using multiple servers and considering setup, processing and removal phases. We also have investigated experimentally how the number of servers and the number of parallel machines affect the total completion time.

Synthesis and Etch Characteristics of Organic-Inorganic Hybrid Hard-Mask Materials (유-무기 하이브리드 하드마스크 소재의 합성 및 식각 특성에 관한 연구)

  • Yu, Je-Jeong;Hwang, Seok-Ho;Kim, Sang-Bum
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.4
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    • pp.1993-1998
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    • 2011
  • Semiconductor industry needs to have fine patterns in order to fabricate the high density integrated circuit. For nano-scale patterns, hard-mask is used to multi-layer structure which is formed by CVD (chemical vaporized deposition) process. In this work, we prepared single-layer hard-mask by using organic-inorganic hybrid polymer for spin-on process. The inorganic part of hard-mask was much easier etching than photo resist layer. Beside, the organic part of hard-mask was much harder etching than substrate layer. We characterized the optical and morphological properties to the hard mask films using organic-inorganic hybrid polymer, and then etch rate of photo resist layer and hard-mask film were compared. The hybrid polymer prepared from organic and inorganic materials was found to be useful hard-mask film to form the nano-patterns.

The properties of pad conditioning according to manufacturing methods of CMP pad conditioner (CMP 패드 컨디셔너의 제조공법에 따른 패드 컨디셔닝 특성)

  • Kang S.K.;Song M.S.;Jee W.H.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.10a
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    • pp.362-365
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    • 2005
  • Currently Chemical Mechanical Planarization (CMP) has become an essential step in the overall semiconductor wafer fabrication technology. Especially the CMP pad conditioner, one of the diamond tools, is required to have strong diamond retention. Strong cohesion between diamond grits and metal matrix prevents macro scratch on the wafer. If diamond retention is weak, the diamond will be pulled out of metal matrix. The pulled diamond grits are causative of macro scratch on wafer during CMP process. Firstly, some results will be reported of cohesion between diamond grits and metal matrix on the diamond tools prepared by three different manufacturing methods. A measuring instrument with sharp cemented carbide connected with a push-pull gauge was manufactured to measure the cohesion between diamond grits and metal matrix. The retention force of brazed diamond tool was stronger than the others. The retention force was also increased in proportion to the contact area of diamond grits and metal matrix. The brazed diamond tool has a strong chemical combination of the interlayer composed of chrome in metal matrix and carbon which enhance the interfacial cohesion strength between diamond grits and metal matrix. Secondly, we measured real-time data of the coefficient of friction and the pad wear rate by using CMP tester (CETR, CP-4). CMP pad conditioner samples were manufactured by brazed, electro-plated and sintered methods. The coefficient of friction and the pad wear rate were shown differently according to the arranged diamond patterns. Consequently, the coefficient of friction is increased according as the space between diamonds is increased or the concentration of diamonds is decreased. The pad wear rate is increased according as the degree of diamond protrusion is increased.

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