• 제목/요약/키워드: Semiconductor etching process

검색결과 253건 처리시간 0.027초

실시간 데이터를 위한 64M DRAM s-Poly 식각공정에서의 웨이퍼 상태 예측 (Wafer state prediction in 64M DRAM s-Poly etching process using real-time data)

  • 이석주;차상엽;우광방
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
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    • pp.664-667
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    • 1997
  • For higher component density per chip, it is necessary to identify and control the semiconductor manufacturing process more stringently. Recently, neural networks have been identified as one of the most promising techniques for modeling and control of complicated processes such as plasma etching process. Since wafer states after each run using identical recipe may differ from each other, conventional neural network models utilizing input factors only cannot represent the actual state of process and equipment. In this paper, in addition to the input factors of the recipe, real-time tool data are utilized for modeling of 64M DRAM s-poly plasma etching process to reflect the actual state of process and equipment. For real-time tool data, we collect optical emission spectroscopy (OES) data. Through principal component analysis (PCA), we extract principal components from entire OES data. And then these principal components are included to input parameters of neural network model. Finally neural network model is trained using feed forward error back propagation (FFEBP) algorithm. As a results, simulation results exhibit good wafer state prediction capability after plasma etching process.

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물중탕을 이용한 대면적 SiNx EUV 펠리클 제작 (Manufacturing Large-scale SiNx EUV Pellicle with Water Bath)

  • 김정환;홍성철;조한구;안진호
    • 반도체디스플레이기술학회지
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    • 제15권1호
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    • pp.17-21
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    • 2016
  • EUV (Extreme Ultraviolet) pellicle which protects a mask from contamination became a critical issue for the application of EUV lithography to high-volume manufacturing. However, researches of EUV pellicle are still delayed due to no typical manufacturing methods for large-scale EUV pellicle. In this study, EUV pellicle membrane manufacturing method using not only KOH (potassium hydroxide) wet etching process but also a water bath was suggested for uniform etchant temperature distribution. KOH wet etching rates according to KOH solution concentration and solution temperature were confirmed and proper etch condition was selected. After KOH wet etching condition was set, $5cm{\times}5cm$ SiNx (silicon nitride) pellicle membrane with 80% EUV transmittance was successfully manufactured. Transmittance results showed the feasibility of wet etching method with water bath as a large-scale EUV pellicle manufacturing method.

LCD 공정용 C3F6 가스를 이용한 Si3N4 박막 식각공정 및 배출가스에 관한 연구 (A Study on Etching of Si3N4 Thin Film and the Exhausted Gas Using C3F6 Gas for LCD Process)

  • 전성찬;공대영;표대승;최호윤;조찬섭;김봉환;이종현
    • 한국진공학회지
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    • 제21권4호
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    • pp.199-204
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    • 2012
  • $SF_6$ 가스는 반도체 및 디스플레이 제조공정 중 건식식각 공정에서 널리 사용되는 가스이다. 하지만 $SF_6$ 가스는 대표적인 온실가스로서 지구 온난화에 큰 영향을 끼치기 때문에 반도체 및 디스플레이 공정에서 $SF_6$ 가스를 대체할 수 있는 가스의 연구가 필요한 상황이다. 그 후보군으로 떠오르고 있는 가스 중의 하나가 바로 $C_3F_6$ 가스이다. 이 가스를 이용하여 $Si_3N_4$ 박막을 건식식각 방법인 Reactive Ion Etching 공정을 수행하여 식각 특성에 관하여 연구하였으며, 흡착제 Zeolite 5A를 이용하여 식각공정 중 배출되는 가스 성분을 감소시켰다. Plasma Enhanced Chemical Vapor Deposition 장비를 이용하여 500 nm 두께의$Si_3N_4$ 박막을 증착하였으며, 노광 공정을 통해 패터닝을 한 후 Reactive Ion Etching 공정을 수행하였다. 그리고 Scanning Electron Microscope 장비를 이용하여 $Si_3N_4$ 박막의 식각된 단면과 식각율을 확인하였다. 또한 공정 후 흡착제 Zeolite 5A를 통과하기 전과 후에 배출되는 가스를 포집하여 Gas Chromatograph-Mass Spectrophotometry 장비를 이용하여 가스 성분을 측정 및 비교하였다.

Sensitivity Analysis of Plasma Charge-up Monitoring Sensor

  • Lee Sung Joon;Soh Dea-Wha;Hong Sang Jeen
    • Journal of information and communication convergence engineering
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    • 제3권4호
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    • pp.187-190
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    • 2005
  • High aspect ratio via-hole etching process has emerged as one of the most crucial means to increase component density for ULSI devices. Because of charge accumulation in via-hole, this sophisticated and important process still hold several problems, such as etching stop and loading effects during fabrication of integrated circuits. Indeed, the concern actually depends on accumulated charge. For monitoring accumulated charge during plasma etching process, charge-up monitoring sensor was fabricated and tested under some plasma conditions. This paper presents a neural network-based technique for analyzing and modeling several electrical performance of plasma charge-up monitoring sensor.

다중 채널 EPD제어기의 개발 (Development of multiple channel EPD controller)

  • 최순혁;차상엽;이종민;우광방
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
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    • pp.1500-1503
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    • 1997
  • In this paper a multiple channel EPD controller is developed which enables us to detect endpoints simultaneously in the plasma etching process operated in multiple etching chambers and its performance characteristic are investigated. for the accurate detectiion of endpoint the developed EDP controller was able to implement endpoint detectiions by integrating the existing EPD controllers with the techiques of artificial intellignet, to enhance its performance. The performance of the developed EPD controller was carried out by repeated experiments of endpoint detection in the acrual production line of semiconductor manufacturing. It's utility for endpoint detectiion was accurately evaluated in various etching process. The control capability of multiple etching chambers enhances its application compared with the existing one, and also increases the user utility os that the efficiency of operation was improved.

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식각 용기 가열에 의한 라디칼 손실 제어가 고선택비 산화막 식각에 미치는 영향 (Effect of the Radical Loss Control by the Chamber Wall Heating on the Highly Selective $SiO_2$ etching)

  • 김정훈;이호준;주정훈;황기웅
    • 한국진공학회지
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    • 제5권2호
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    • pp.169-174
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    • 1996
  • The applications of the high density plasma sources to the etching in semiconductor fabrication process are actively studied because of the more strict requirement from the dry etching process due to shrinking down of the critical dimension. But in the oxide etching with the high density plasma sources, abundant fluorine atoms released from the flurocarbon feed gas make it difficult to get the highly selective $SiO_2/Si$ etching. In this study, to improve the $SiO_2/Si$ etch selectivity through the control of the radical loss channels, we propose the wall heating , one of methods of controlling loss mechanisms. With appearance mass spectroscopy(AMS) and actinometric optical emission spectroscopy(OES), the increase of both radicals impinging on the substrate and existing in bulk plasma, and the decrease of the fluorine atom with wall temperature are observed. As a result, a 40% improvement of the selectivity was achieved for the carbon rich feed gas.

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이온빔 스퍼터링법에 의한 다층막의 표면특성변화 (The surface propery change of multi-layer thin film on ceramic substrate by ion beam sputtering)

  • 이찬영;이재상
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.259-259
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    • 2008
  • The LTCC (Low Temperature Co-fired Ceramic) technology meets the requirements for high quality microelectronic devices and microsystems application due to a very good electrical and mechanical properties, high reliability and stability as well as possibility of making integrated three dimensional microstructures. The wet process, which has been applied to the etching of the metallic thin film on the ceramic substrate, has multi process steps such as lithography and development and uses very toxic chemicals arising the environmental problems. The other side, Plasma technology like ion beam sputtering is clean process including surface cleaning and treatment, sputtering and etching of semiconductor devices, and environmental cleanup. In this study, metallic multilayer pattern was fabricated by the ion beam etching of Ti/Pd/Cu without the lithography. In the experiment, Alumina and LTCC were used as the substrate and Ti/Pd/Cu metallic multilayer was deposited by the DC-magnetron sputtering system. After the formation of Cu/Ni/Au multilayer pattern made by the photolithography and electroplating process, the Ti/Pd/Cu multilayer was dry-etched by using the low energy-high current ion-beam etching process. Because the electroplated Au layer was the masking barrier of the etching of Ti/Pd/Cu multilayer, the additional lithography was not necessary for the etching process. Xenon ion beam which having the high sputtering yield was irradiated and was used with various ion energy and current. The metallic pattern after the etching was optically examined and analyzed. The rate and phenomenon of the etching on each metallic layer were investigated with the diverse process condition such as ion-beam acceleration energy, current density, and etching time.

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Surface Analysis of Aluminum Bonding Pads in Flash Memory Multichip Packaging

  • Son, Dong Ju;Hong, Sang Jeen
    • Transactions on Electrical and Electronic Materials
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    • 제15권4호
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    • pp.221-225
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    • 2014
  • Although gold wire bonding techniques have already matured in semiconductor manufacturing, weakly bonded wires in semiconductor chip assembly can jeopardize the reliability of the final product. In this paper, weakly bonded or failed aluminum bonding pads are analyzed using X-ray photoelectron spectroscopy (XPS), Auger electron Spectroscopy (AES), and energy dispersive X-ray analysis (EDX) to investigate potential contaminants on the bond pad. We found the source of contaminants is related to the dry etching process in the previous manufacturing step, and fluorocarbon plasma etching of a passivation layer showed meaningful evidence of the formation of fluorinated by-products of $AlF_x$ on the bond pads. Surface analysis of the contaminated aluminum layer revealed the presence of fluorinated compounds $AlOF_x$, $Al(OF)_x$, $Al(OH)_x$, and $CF_x$.

반도체 기판 교차 파지 방법 (Chucking Method of Substrate Using Alternating Chuck Mechanism)

  • 안영기;최중봉;구교욱;조중근;김태성
    • 반도체디스플레이기술학회지
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    • 제8권1호
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    • pp.1-5
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    • 2009
  • Typically, single-wafer wet etching is done by dispensing chemical onto the front and back side of spin wafer. The wafer is fixed by a number of chuck pins, which obstruct the chemical flow and would result in the incomplete removal of the remaining film, which can become a source of contamination in the next process. In this paper, we introduce a novel design of wafer chuck, in which chuck pins are groupped into two and each group of pins fixes the substrate alternatively. Two groups of chuck pins fix the high-speed spin substrate with non contact method using a magnetic material. The actual process has been executed to observe the effectiveness of this new wafer chuck. It was found that the new wafer chuck performed better than the conventional wafer chuck for removing the remaining film from the bevel and edge side of substrate.

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플라즈마 정보인자를 활용한 SiO2 식각 깊이 가상 계측 모델의 특성 인자 역할 분석 (Role of Features in Plasma Information Based Virtual Metrology (PI-VM) for SiO2 Etching Depth)

  • 장윤창;박설혜;정상민;유상원;김곤호
    • 반도체디스플레이기술학회지
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    • 제18권4호
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    • pp.30-34
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    • 2019
  • We analyzed how the features in plasma information based virtual metrology (PI-VM) for SiO2 etching depth with variation of 5% contribute to the prediction accuracy, which is previously developed by Jang. As a single feature, the explanatory power to the process results is in the order of plasma information about electron energy distribution function (PIEEDF), equipment, and optical emission spectroscopy (OES) features. In the procedure of stepwise variable selection (SVS), OES features are selected after PIEEDF. Informative vector for developed PI-VM also shows relatively high correlation between OES features and etching depth. This is because the reaction rate of each chemical species that governs the etching depth can be sensitively monitored when OES features are used with PIEEDF. Securing PIEEDF is important for the development of virtual metrology (VM) for prediction of process results. The role of PIEEDF as an independent feature and the ability to monitor variation of plasma thermal state can make other features in the procedure of SVS more sensitive to the process results. It is expected that fault detection and classification (FDC) can be effectively developed by using the PI-VM.