• 대한기계학회논문집B
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• 제39권4호
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• pp.301-307
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• 2015

MC-50 사이클로트론에서 방출되는 양성자 빔은 직경이 2-3 mm 의 가우시안 분포를 가진다. 이렇게 넓게 조사되는 양성자 빔은 작은 스팟과 정밀한 위치정밀도를 요구하는 반도체 식각, 마이크로 머시닝 등에는 사용될 수 없다. 본 연구에서는 좀 더 경제적인 대안으로 양성자 빔을 마이크로 홀에 통과시켜 수십 ${\mu}m$ 의 직경을 가지도록 조형하는 방법을 제시하였다. 양성자 빔의 조형을 위하여 평균 직경 $21{\mu}m$, 두께 9mm 의 세장비 428 의 마이크로 홀을 제작하였다. 마이크로 홀과 양성자 빔을 정밀하게 정렬하여 양성자 빔을 조형하였다. 이렇게 조형된 양성자 빔을 이용하여 수십 ${\mu}m$ 크기의 마이크로 구조물의 가공성 확인 실험을 실시하였다. 또한 GEANT4 를 이용한 전산모사를 이용하여 해석한 후, 실험결과와 비교하고 분석하였다. 본 연구를 통하여 MC-50 사이클로트론이 조형 장치와 함께 20 마이크론 대의 3 차원 구조물 제작을 위한 마이크로 공정기술에의 사용 가능성을 확인하였다.

• 한국대기환경학회지
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• 제20권5호
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• pp.625-632
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• 2004

Perfluorocompounds ($PFC_s$), such as tetrafluoromethane ($CF_4$) and hexafluoroethane ($C_2F_6$), have been widely used as plasma etching and chemical vapor deposition (CVD) gases for semiconductor manufacturing processes. Since these $PFC_s$ are known to cause a greenhouse effect intensively, there has been a growing interest in reducing $PFC_s$ emissions. Among various $CF_4$ decomposing techniques, a dielectric barrier discharge (DBD) is considered as one of a promising candidate because it has been successfully used for generating ozone ($O_3$) and decomposing nitrogen oxide (NO). Firstly, optimal concentration of oxygen for $CF_4$ decomposition was found to figure out how many primary and secondary reactions are associated with DBD process. Secondary, to find effective discharge method for $CF_4$ decomposition, a streamer and a glow mode in DBD are experimentally compared, which includes (i) coaxialcylinder DBD, (ii) DBD reactor packed with glass beads. and (iii) a glow mode operation with a helium gas. The test results showed that optimal concentration of oxygen was ranged 500 ppm~1% for treating 500 ppm of $CF_4$ and helium glow discharge was the most efficient one to decompose $CF_4$.

• 센서학회지
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• 제14권1호
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• pp.22-27
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• 2005

A thermoelectric flow sensor for small quantity of gas flow rate was fabricated using silicon wafer semiconductor process and bulk micromachining technology. Evanohm R alloy heater and chromel-constantan thermocouples were used as a generation heat unit and sensing parts, respectively. The heater and thermocouples are thermally isolated on the $Si_{3}N_{4}/SiO_{2}/Si_{3}N_{4}$ laminated membrane. The characteristics of this sensor were observed in the flow rate range from 0.2 slm to 1.0 slm and the heater power from 0.72 mW to 5.63 mW. The results showed that the sensitivities $(({\partial}({\Delta}V)/{\partial}(\dot{q}));{\;}{\Delta}V$ : voltage difference, $\dot{q}$ : flow rate) were increased in accordance with heater power rise and decreasing of flow rate.

• 대한기계학회논문집A
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• 제26권3호
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• pp.428-435
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• 2002

Pyroelectric $Pb(Zr_{0.3}Ti_{0.7})O_3$ (PZT30/70) thin film IR detectors has been fabricated and characterised. The PZT30/70 thin film was deposited onto $Pt/Ti/Si_3N_4/SiO_2/Si$ substrate by the sol-gel process. Four different substrate conditions were studied for their effects on the pyroelectric responses of the IR detectors. The substrate conditions were the combinations of the Si etching and the Pt/Ti patterning. In the Si etched substrate, the $Si_3N_4/SiO_2$ composite layer was used as silicon etch-stop, and was used as the membrane to support the PZT pyroelectric film element as well. The measured pyroelectric current and voltage responses of detectors fabricated on the micro-machined thin $Si_3N_4/SiO_2$ membrane were two orders higher than those of the detectors on the bulk-silicon. For detectors on the membrane substrate, the Pt/Ti patterned detectors showed a 2-times higher pyroelectric response than that of not-patterned detectors. On the other hand, the pyroelectric response of the detectors on the not-etched Si substrate was almost the same, regardless of the Pt/Ti patterning. It was also found that the rise time strongly depended on the substrate thickness: the thicker the substrate was, the longer the rise-time.

• 센서학회지
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• 제13권2호
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• pp.128-132
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• 2004

Short wave infrared (SWIR) photovoltaic devices have been fabricated from metal organic vapour phase epitaxy (MOVPE) grown n- on p- HgCdTe films on GaAs substrates. The MOVPE grown films were processed into mesa type discrete devices with wet chemical etching employed for meas delineation and ZnS surface passivatlon. ZnS was thermally evaporated from effusion cell in an ultra high vacuum (UHV) chamber. The main features of the ZnS deposited from effusion cell in UHV chamber are low fixed surface charge density, and small hysteresis. It was found that a negative flat band voltage with -0.6 V has been obtained for Metal Insulator Semiconductor (MIS) capacitor which was evaporated at $910^{\circ}C$ for 90 min. Current-Voltage (I-V) and temperature dependence of the I-V characteristics were measured in the temperature range 80 - 300 K. The Zero bias dynamic resistance-area product ($R_{0}A$) was about $7500{\Omega}-cm^{2}$ at room temperature. The physical mechanisms that dominate dark current properties in the HgCdTe photodiodes are examined by the dependence of the $R_{0}A$ product upon reciprocal temperature. From theoretical considerations and known current expressions for thermal and tunnelling process, the device is shown to be diffusion limited up to 180 K and g-r limited at temperature below this.

• 한국진공학회:학술대회논문집
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• 한국진공학회 1998년도 제14회 학술발표회 논문개요집
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• pp.20-20
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• 1998

I Ion beam technology has recently attracted much interest because it has exciting t technological p아:ential for surface analysis, ion beam mixing, surface cleaning and etching i in thin film growth and semiconductor fabrication processes, etc. Es야~cially, ion beam s sputtering has been widely used for sputter depth profiling with x-photoelectron S spectroscopy (XPS) , Auger electron s$\pi$~troscopy(AES), and secondary-ion mass S야i따oscopy(SIMS). However, The problem of surface compositional ch없1ge due to ion b bombardment remains to be understo여 없ld solved. So far sputtering processes have been s studied by s따face an외ysis tools such as XPS, AES, and SIMS which use the sputtering p process again. It would be improbable to measure the modified surface composition profiles a accurately due to ion beam bombardment with surface analysis techniques based on sputter d depth profiling. However, recently Medium energy ion scattering spectroscopy(MEIS) has b been applied to study the sputtering of solid surface at ion bombardment and has been p proved that it has been extremely valuable in probing the surface composition 뻐d s structure nondestructively and quantita디vely with less than 1.0 nm depth resolution. To u understand the sputtering processes of solid surface at ion bombardment, The Molecular D Dynamics(MD) and Monte Carlo(MC) simulation has been used and give an intimate i insight into the sputtering processes of solid surfaces. In this presentation, the sputtering processes of alloys and compound samples at ion b bombardment will be reviewed and the MEIS results for the Ar+ sputter induced altered l layer of the TazOs thin film 뻐dd없nage profiling of Ar+ ion sputt얹"ed Si(100) surface will b be discussed with the results of MD and MC simulation.tion.

• 한국대기환경학회지
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• 제26권6호
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• pp.690-696
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• 2010

Abatement of perfluorocompounds (PFCs) used in semiconductor and display industries has received an attention due to the increasingly stricter regulation on their emission. In order to meet this circumstance, we have developed a radio frequency (RF) driven plasma reactor with multiple annular shaped electrodes, characterized by an easy installment between a processing chamber and a vacuum pump. Abatement experiment has been performed with respect to $CF_4$, a representative PFCs widely used in the plasma etching process, by varying the power, $CF_4$ and $O_2$ flow rates, $CF_4$ concentration, and pressure. The influence of these variables on the $CF_4$ abatement was analyzed and discussed in terms of the destruction & removal efficiency (DRE), measured with a Fourier transform infrared (FTIR) spectrometer. The results revealed that DRE was enhanced with the increase in the discharge power and pressure, but dropped with the $CF_4$ flow rate and concentration. The addition of small quantity of $O_2$ lead to the improvement of DRE, which, however, leveled off and then decreased with $O_2$ flow rate.

• 동굴
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• 제76호
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• pp.37-42
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• 2006

The Dielectric Barrier Discharge (DBD) is a nonequilibrium gas discharge that is generated in the space between two electrodes, which are separated by an insulating dielectric layer. The dielectric layer can be put on either of the two electrodes or be inserted in the space between two electrodes. If an AC or pulse high voltage is applied to the electrodes that is operated at applied frequency from 50Hz to several MHz and applied voltages from a few to a few tens of kilovolts rms, the breakdown can occur in working gas, resulting in large numbers of micro-discharges across the gap, the gas discharge is the so called DBD. Compared with most other means for nonequilibrium discharges, the main advantage of the DBD is that active species for chemical reaction can be produced at low temperature and atmospheric pressure without the vacuum set up, it also presents many unique physical and chemical process including light, heat, sound and electricity. This has led to a number of important applications such as ozone synthesizing, UV lamp house, CO2 lasers, et al. In recent years, due to its potential applications in plasma chemistry, semiconductor etching, pollution control, nanometer material and large area flat plasma display panels, DBD has received intensive attention from many researchers and is becoming a hot topic in the field of non-thermal plasma.

• 전자공학회논문지D
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• 제36D권10호
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• pp.17-22
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• 1999

이 논문에서는 플래시 EEPROM 셀에서의 데이터 보존 특성을 개선하기 위해서 IPD(inter-poly-dielectrics) 층을 사용하는 새로운 제안에 관한 연구 결과들을 논의하였다. 이 연구를 위하여 약 10nm 두께의 게이트 산호막을 갖으며 또한 ONO 또는 ONON IPD 층을 갖는 적층형-게이트 플래시 EEPROM 셀들을 제작하였다. 측정 결과를 보면 ONO IPD 층을 갖는 소자들은 데이터 보존 특성이 심각하게 열화 되었으며, 그 특성의 활성화 에너지도 0.78 eV로 플래시 EEPROM 셀을 위하여 요구되는 최소 값(1.0 eV)보다 상당히 낮았다. 이는 구동 소자용 트랜지스터(peripheral MOSFET) 소자들의 게이트 산호막을 형성하기 위한 건열산화 공정 바로 직전에 실시하는 세정 공정 동안 IPD 층의 상층 산화막의 일부 또는 전부가 식각되었기 때문인 것으로 믿어진다. 반면에, ONON IPD 층을 갖는 소자들의 데이터 보존 특성은 상단히 (약 50% 이상) 개선되었으며 활성화 에너지도 1.1 eV인 것으로 나타났다. 이는 IPD 층에서 상층 산화막위에 있는 질화막이 그 세정 공정 동안 산화막이 식각되는 것을 방지해 주기 때문임에 틀림없다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.134-134
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• 2011

High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.