• 반도체디스플레이기술학회지
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• 제5권2호
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• pp.41-46
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• 2006

Wet etching process in recent semiconductor manufacturing is devided into batch and single wafer type. Batch type wet etching process provides more throughput with poor etching uniformity compared to single wafer type process. Single wafer process achieves better etching uniformity by boom-swing injected chemical on rotating wafer. In this study, etching characteristics of $SiO_2$ layer at room and elevated temperature is evaluated and compared. The difference in etching rate and uniformity of each condition is identified, and the temperature profile of injected chemical is theoretically calculated and compared to that of experimental result. Better etching uniformity is observed with single wafer tool with boom-swing injection compared to single wafer process without boom-swing or batch type tool.

• 반도체디스플레이기술학회지
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• 제5권2호
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• pp.47-49
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• 2006

Various methods of making thin film is being used in semiconductor manufacturing process. The most common method in this field includes CVD(Chemical Vapor Deposition) and PVD(Physical Vapor Deposition). Thin film is deposited on both the backside and the frontside of wafers. The thin film deposited on the backside has poor thickness profile, and can contaminate wafers in the following processes. If wafers with the thin film remaining on the backside are immersed in batch type process tank, the thin film fall apart from the backside and contaminate the nearest wafer. Thus, it is necessary to etch the backside of the wafer selectively without etching the frontside, and chemical injection nozzle positioned under the wafer can perform the backside etching. In this study, the backside chemical injection nozzle with optimized chemical injection profile is built for single wafer tool. The evaluation of this nozzle, performed on $Si_3N_4$ layer deposited on the backside of the wafer, shows the etching rate uniformity of less than 5% at the etching rate of more than $1000{\AA}$.

• 반도체디스플레이기술학회지
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• 제19권2호
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• pp.77-81
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• 2020

Silicon wafer etching in micro electro mechanical systems (MEMS) fabrication is challenging to form 3-D structures. Well known Si-wet etch of silicon employs potassium hydroxide (KOH), tetramethylammonium hydroxide (TMAH) and sodium hydroxide (NaOH). However, the existing silicon wet etching process has a fatal disadvantage that etching of the back side of the wafer is hard to avoid. In this study, a wet etching bath for 150 mm wafers was designed to prevent back-side etching of silicon wafer, and we demonstrated the optimized process recipe to have anisotropic wet etching of silicon wafer without any damage on the backside. We also presented the design of wet bath for 300 mm wafer processing as a promising process development.

• 반도체디스플레이기술학회지
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• 제16권3호
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• pp.41-46
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• 2017

This study aims to select suitable co-solvents and to obtain optimal process conditions in order to improve process efficiency and productivity through experimental results obtained under various experimental conditions for the etching and rinsing process using liquid carbon dioxide and supercritical carbon dioxide. Acetone was confirmed to be effective through basic experiments and used as the etching solution for MEMS-wafer etching in this study. In the case of using liquid carbon dioxide as the solvent and acetone as the etching solution, these two components were not mixed well and showed a phase separation. Liquid carbon dioxide in the lower layer interfered with contact between acetone and Mems-wafer during etching, and the results after rinsing and drying were not good. Based on the results obtained under various experimental conditions, the optimum process for treating MEMS-wafer using supercritical CO2 as the solvent, acetone as the etching solution, and methanol as the rinsing solution was set up, and MEMS-wafer without stiction can be obtained by continuous etching, rinsing and drying process. In addition, the amount of the etching solution (acetone) and the cleaning liquid (methanol) compared to the initial experimental values can be greatly reduced through optimization of process conditions.

• 한국전기전자재료학회논문지
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• 제14권2호
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• pp.117-122
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• 2001

In this paper, we report on photoelectrochemical etching process of 6H-SiC semiconductor wafer. The etching was performed in two-step process; anodization of SiC surface to form a deep porous layer and thermal oxidation followed by an HF dip. Etch rate of about 615${\AA}$/min was obtained during the anodization using a dilute HF(1.4wt% in H$_2$O) electrolyte with the etching potential of 3.0V. The etching rate was increased with the bias voltage. It was also found out that the adition of appropriate portion of H$_2$O$_2$ into the HF solution improves the etching rate. The etching process resulted in a higherly anisotropic etching characteristics and showed to have a potential for the fabrication of SiC devices with a novel design.

• 반도체디스플레이기술학회지
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• 제22권4호
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• pp.131-135
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• 2023

Neural network-based time series models called time series neural networks (TSNNs) are trained by the error backpropagation algorithm and used to predict process shifts of parameters such as gas flow, RF power, and chamber pressure in reactive ion etching (RIE). The training data consists of process conditions, as well as principal components (PCs) of optical emission spectroscopy (OES) data collected in-situ. Data are generated during the etching of benzocyclobutene (BCB) in a SF₆/O₂ plasma. Combinations of baseline and faulty responses for each process parameter are simulated, and a moving average of TSNN predictions successfully identifies process shifts in the recipe parameters for various degrees of faults.

• 반도체디스플레이기술학회지
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• 제8권4호
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• pp.1-5
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• 2009

This investigation is applied Taguchi method and the analysis of variance(ANOVA) to the reactive ion etching(RIE) characteristics of $SiO_2$ film coated on a wafer with Experimental Analysis and Optimization of $CF_4/O_2$ Plasma Etching Process mixture. Plans of experiments via nine experimental runs are based on the orthogonal arrays. A $L_9$ orthogonal array was selected with factors and three levels. The three factors included etching time, RF power, gas mixture ratio. The etching rate of the film were measured as a function of those factors. In this study, the etching thickness mean and uniformity of thickness of the RIE are adopted as the quality targets of the RIE etching process. The partial factorial design of the Taguchi method provides an economical and systematic method for determining the applicable process parameters. The RIE are found to be the most significant factors in both the thickness mean and the uniformity of thickness for a RIE etching process.

• 한국정밀공학회지
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• 제16권11호
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• pp.98-105
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• 1999

As the IC(Integrated Circuit) has been densified and complicated, it is required to thorough process control to improve yield. Experts, for this purpose, focused on the process analysis automation, which is came from the strict data management in semiconductor manufacturing. In this paper, we presents the process analysis system that can analyze causes, for a output after processes. Also, the plasma etching process that highly affects yield among semiconductor process is modeled to predict a output before the process. To approach this problem, we use adaptively trained neural networks that exhibit superior accuracy over statistical techniques. And in comparison with methods in other paper, a method that history of trend for input data is considered is shown to offer advantage in both learning and prediction capability. This research regards CD(Critical Dimension) that is considerable in high integrated circuit as output variable of the prediction model.

• 한국진공학회지
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• 제17권2호
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• pp.113-116
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• 2008

반도체 소자 집적도의 비약적인 발전으로 인하여 반도체 공정은 더욱 다층화 되어가고 있다. 이러한 다층화 공정에서는 필수적으로 여러 단계의 패턴을 형성하기 위하여 Photoresist(PR)를 이용한 식각 공정을 사용하게 된다. 이러한 식각 공정에서 다단계 식각 공정으로 인한 공정시간 증가와 식각 후 남은 잔여 PR residue는 초고집적화된 현 반도체 산업에서는 소자에 치명적인 문제를 발생시킨다. 따라서 본 연구에서는 기존 PR strip 용액을 플라즈마에 의하여 액체 상태로 활성화하여 기존의 건식세정법과 습식세정법을 동시에 사용하여 PR을 효과적으로 제거하기 위한 방법을 연구하였다. 플라즈마에 의하여 약액을 활성화하기 위하여 먼저 플라즈마 약액활성화를 위한 장치를 simulation하여 실험 장치에서 균일한 gas흐름을 확인하였다. 이후 플라즈마의 세기를 0V에서 100V까지 증가시켜 약액을 활성화한 후 PR을 strip하여 각 플라즈마 세기에서의 식각률을 조사하였으며 80V에서 가장 빠른 식각률을 나타났다. 또한 0V와 80V의 Dilution에 대한 영향을 확인하였으며 약액을 Dilution 후에도 식각률은 더욱 향상됨을 확인할 수 있었다. 이러한 세정 시간의 단축은 여러 단계의 식각 공정 시간을 단축하여 반도체 공정에서 소자 생산을 위한 시간을 단축하게 된다. 또한 각 세정공정마다 증가한 세정 공정으로 인하여 세정액의 사용이 많아져 세정액 폐수로 인한 환경문제가 심각해지고 있다. 세정 약액 활성화 방법을 사용함으로써 세정액의 절감효과가 나타난다.

• 한국전기전자재료학회논문지
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• 제36권2호
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• pp.99-108
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• 2023

Currently, semiconductor manufacturing industry heavily relies on a wide range of high global warming potential (GWP) gases, particularly during etching and cleaning processes, and their use and relevant carbon emissions are subject to global rules and regulations for achieving carbon neutrality by 2050. To replace high GWP gases in near future, dry etching using alternative low GWP gases is thus being under intense investigations. In this review, we report a current status and recent progress of the relevant research activities on dry etching processes using a low GWP gas. First, we review the concept of GWP itself and then introduce the difference between high and low GWP gases. Although most of the studies have concentrated on potentially replaceable additive gases such as C₄F₈, an ultimate solution with a lower GWP for main etching gases including CF₄ should be developed; therefore, we provide our own perspective in this regard. Finally, we summarize the advanced dry etch process research with low GWP gases and list up several issues to be considered in future research.