• Journal of Institute of Control, Robotics and Systems
• /
• v.5 no.1
• /
• pp.54-61
• /
• 1999

Objective of the research is to put the vast and complex fault tracking knowledge of human experts in semiconductor production line into the knowledge base of computer system. We mined the fault tracking knowledge of domain experts(engineers of production line) for the construction of knowledge base of the expert system. Object oriented fact models which increase the extensibility and reusability have been built. The rules are designed to perform the fault diagnosis of the items in production device. We have exploited the evidence accumulation method to assign check priority in rules. The major contribution is in the overall design and implementation of the nile base and related facts of the expert system in object oriented paradigm for the application of the system in fault diagnosis in semiconductor production line.

• Journal of Korean Society of Industrial and Systems Engineering
• /
• v.39 no.1
• /
• pp.153-161
• /
• 2016

Semiconductor manufacturing has suffered from the complex process behavior of the technology oriented control in the production line. While the technological processes are in charge of the quality and the yield of the product, the operational management is also critical for the productivity of the manufacturing line. The fabrication line in the semiconductor manufacturing is considered as the most complex part because of various kinds of the equipment, re-entrant process routing and various product devices. The efficiency and the productivity of the fabrication line may give a significant impact on the subsequent processes such as the probe line, the assembly line and final test line. In the management of the re-entrant process such as semiconductor fabrication, it is important to keep balanced fabrication line. The Performance measures in the fabrication line are throughput, cycle time, inventory, shortage, etc. In the fabrication, throughput and cycle time are the conflicting performance measures. It is very difficult to achieve two conflicting goal simultaneously in the manufacturing line. The capacity of equipment is important factor in the production planning and scheduling. The production planning consideration of capacity can make the scheduling more realistic. In this paper, an input and scheduling rule are to achieve the balanced operation in semiconductor fabrication line through equipment capacity and workload are proposed and evaluated. New backward projection and scheduling rule consideration of facility capacity are suggested. Scheduling wafers on the appropriate facilities are controlled by available capacity, which are determined by the workload in terms of the meet the production target.

• Journal of the Semiconductor & Display Technology
• /
• v.20 no.3
• /
• pp.57-64
• /
• 2021

The domestic semiconductor industry can produce various products that will satisfy customer needs by diversifying assembly parts and increasing compatibility between them. It is necessary to improve the production line as a method to reduce the work-in-process inventory (WIP) in the assembly line, the idle time of the worker, and the idle time of the process. The improvement of the production line is to balance the capabilities of each process as a whole, and to determine the timing of product input or the order of the work process so that the time required between each process is balanced. The purpose of this study is to find the optimal WIP and buffer size through SA (Simulated Annealing) that minimizes lead time while matching the number of two parts in a parallel assembly line with bottleneck process. The WIP level and buffer size obtained by the SA algorithm were applied to the CONWIP and DBR systems, which are the existing production systems, and the simulation was performed by applying them to the new hybrid production system. Here, the Hybrid method is a combination of CONWIP and DBR methods, and it is a production system created by setting new rules. As a result of the Simulation, the result values were derived based on three criteria: lead time, production volume, and work-in-process inventory. Finally, the effect of the hybrid production method was verified through comparative analysis of the result values.

• IE interfaces
• /
• v.12 no.3
• /
• pp.437-447
• /
• 1999

Modeling and system development for the fabrication process in the semiconductor manufacturing is presented in this paper. Maximization of wafer production can be achieved by the wafer flow balance under high utilization of bottleneck machines. Relatively simpler model is developed for the fabrication line by considering main characteristics of logistics. Simulation system is developed to evaluate the line performance such as balance rate, utilization, WIP amount and wafer production. Scheduling rules and input rules are suggested, and tested on the simulation system. We have shown that there exists good combination of scheduling and input rules.

• Proceedings of the Korea Society for Simulation Conference
• /
• 2002.11a
• /
• pp.115-121
• /
• 2002

The growth of semiconductor industry attracted to researchers like design, facility technique and making small size chip areas. But nowadays, cause of technology extension and oversupply and price down, yield improvement is the most important point on growth. This paper describes the computer mode]ing technique as the solutions to analyze the problem, to formalize the semiconductor manufacturing process and to build advanced manufacturing environments. The computer models are built referring an existing 8' wafer production line in Korea.

• Proceedings of the IEEK Conference
• /
• 2004.06b
• /
• pp.481-484
• /
• 2004

To make production and equipment investment plans in semiconductor Line, implementation of many variables is needed. But these factors could bring many changes and the result is hard to predict. Because prediction is hard, it is hard to make a standard. So this project established Semiconductor production plans using LP Algorithm to satisfy all the conditions from the factors and came up with thesis on reasonable and standardized process.

• Journal of the Korea Society for Simulation
• /
• v.15 no.2
• /
• pp.51-57
• /
• 2006

Production environment of semiconductor industry is shifting from 200mm wafer process to 300mm wafer process. In the new era of semiconductor industry, FAB (fabrication) Line Automation is a key issue that semiconductor industry is facing in shifting from 200mm wafer fabrication to 300mm wafer fabrication. In addition, since the semiconductor manufacturing technologies are being widely spread and market competitions are being stiffened, cost-down techniques became basis of growth. Most companies are trying to reduce average cycle time to increase productivity and delivery time. In this paper, we simulated 300mm wafer fabrication semiconductor manufacturing process by laying great emphasis on reduce average cycle time.

• Proceedings of the Korea Society for Simulation Conference
• /
• 2001.10a
• /
• pp.269-273
• /
• 2001

Semiconductor wafer fabrication is a business of high capital investment and fast changing nature. To be competitive, the production in a fab needs to be effectively planned and scheduled starting from the ramping up phase, so that the business goals such as on-time delivery, high output volume and effective use of capital intensive equipment can be achieved. In this paper, we propose Stand Alone layout and In-Line layout are analyzed and compared while varying number of device variable changes. The comparison is performed through simulation using ProSys; a window 98 based discrete system simulation software, as a tool for comparing performance of two proposed layouts. The comparison demonstrates that when the number of device variable change is small, In-Line layout is more efficient in terms of production quantity. However, as the number of device variable change is more than 14 titles, Stand Alone layout prevails over In-Line layout.

• Journal of the Semiconductor & Display Technology
• /
• v.11 no.3
• /
• pp.39-44
• /
• 2012

Electronics in modern lives have become more miniaturized and precise. Multi Layered Ceramic Capacitor (MLCC) occupies 50% of electronic components consisting of electronics. This high volume of the production needs high speed and more precise machine performances. The dominate parts of the production equipments are the module transporting components and the visual inspection module. Most visual inspection has been off-line because of the image processing time. In this paper, a new image processing method is proposed to reduce thousands of matrix calculation for image processing and realize on-line high speed inspection.

• Journal of the Semiconductor & Display Technology
• /
• v.19 no.2
• /
• pp.37-44
• /
• 2020

In improving laser cutting of optical plastic films for mass production of optoelectronics display units, it is important to understand particle contamination over optical film surface due to fume particle generation and dispersion. This numerical study investigates the effects of downward and upward air flow motions on fume particle dispersion around laser cut line. The simulations employ random particle sampling of up to one million fume particles by probabilistic distributions of particle size, ejection velocity and angle, and fume particle dispersion and surface landing are predicted using Basset-Boussinesq-Oseen model of low Reynolds number flows. The numerical results show that downward air flow scatters fume particles of a certain size range farther away from laser cut line and aggravate surface contamination. However, upward air flow pushes fume particles of this size range back toward laser cut line or sucks them up with rising air motion, thus significantly alleviating surface contamination.