• 한국빅데이터학회지
• /
• 제4권2호
• /
• pp.61-71
• /
• 2019

반도체 웨이퍼의 표면을 연마하여 평탄화하는 Chemical Mechanical Planarization(CMP) 공정은 다양한 화학물질과 물리적인 기계장치에 의한 작용을 받기 때문에 공정을 안정적으로 관리하기 힘들다. CMP 공정에서 품질 지표로는 Material Removal Rate(MRR)를 많이 사용하고, CMP 공정의 안정적 관리를 위해서는 MRR을 예측하는 것이 중요하다. 본 연구에서는 머신러닝 기법들을 이용하여 CMP 공정에서 수집된 시계열 센서 데이터를 분석하여 MRR을 예측하는 모형과 공정 품질을 해석하기 위한 분류 모형을 개발한다. 나아가 분류 결과를 분석하여, CMP 공정 품질에 영향을 미치는 유의미한 변수를 파악하고 고품질을 유지하기 위한 공정 조건을 설명한다.

• 한국정보통신학회:학술대회논문집
• /
• 한국정보통신학회 2022년도 춘계학술대회
• /
• pp.507-509
• /
• 2022

자동차 내부 진단 데이터를 수집하기 위해서는 다양한 자동차 부품에 포함되어 있는 ECU(Electronic Control Unit)의 진단데이터를 수집하여야 한다. ECU의 진단데이터를 수집하기 위해서는 진단통신을 활용할 수 있다. 본 논문에서는 표준 진단 통신을 통해 ECU의 기능에 따른 진단데이터를 수집하는 방법과 진단통신 모듈에 대해서 분석하였다. 많은 자동차 제조사가 사용하는 자동차 전장 표준인 AUTOSAR의 표준 모듈 중에서 진단 통신 모듈에 대해서 연구하였으며, 진단데이터 처리가 ECU를 통해 처리되는 과정에 대해서 연구하였다.

• International Journal of Quality Innovation
• /
• 제6권1호
• /
• pp.58-73
• /
• 2005

The objective of this study is to evaluate the equipment risk before and after SEMI S2-93A implementation, thus providing a guideline for safety improvement. Semiconductor Plant A located in Taiwan's Hsinchu Science Based Industrial Park with 147 manufacturing machines was used for risk assessment. This study was carried out in three steps. First, a preliminary hazard analysis was conducted. A detailed process safety evaluation was conducted (Hazard and Operability Study, HAZOP); and finally, the equipment risk comparison before and after Semiconductor Equipment Manufacturing Instruction (SEMI S2-93A) implementation. The preliminary hazard analysis results showed high risk in 21.77% of the manufacturing machines under risk assessment at Plant A. The largest percentage existed in the Diffusion Department. The machine types specified by the hazardous work site review and inspection according to Article 26 of Labor Inspection Regulation (the machines that use such chemicals as, $SiH_4$, HF, HCL, etc. and that are determined to be highly hazardous through preliminary hazard analysis) were added to the detailed process analysis and evaluation. In the third part of this evaluation, the machines at Plant A used for detailed process safety assessment were divided into two groups based on the manufacturing data before and after 1993. The severity, possibility, and actual accident analysis before and after SEMI S2-93A implementation were compared. The Semiconductor Equipment Manufacturing Instruction (SEMI S2-93A) implementation can reduce the severity and possibility of hazard occurrence.

• 산업경영시스템학회지
• /
• 제33권3호
• /
• pp.184-191
• /
• 2010

In the environment of 450mm wafers production known as the next-generation semiconductor production process, one of the most significant features is the full automation over the whole manufacturing processes involved. The full automation system for 450mm wafer production will minimize the human workers' involvement in the manufacturing process as much as possible. In addition, since the importance of an individual wafer processing increases noticeably, it is necessary to develop more robust scheduling systems in the whole manufacturing process than so ever. The scheduling systems for the next-generation semiconductor production processes also should be capable of monitoring individual wafers and collecting useful data on them in real time. Based on the information gathered from these processes, the system should finally have a real-time scheduling functions controlling whole the semiconductor manufacturing processes. In this study, preliminary investigations on the requirements and needed functions for constructing the real time scheduling system and transforming manufacturing environments for 300mm wafers to those of 400mm are conducted and through which the next generation semiconductor processes for efficient scheduling in a clustered production system architecture of the scheduler is proposed. Our scheduling architecture is composed of the modules for real-time scheduling, the clustered production type supporting, the optimal scheduling and so on. The specifications of modules to define the major required functions, capabilities, and the relationship between them are presented.

• 한국정보과학회논문지:컴퓨팅의 실제 및 레터
• /
• 제15권11호
• /
• pp.806-818
• /
• 2009

반도체(semiconductor) 기술은 1950년대에 집적 회로(integrated circuit, IC)가 발명된 이후 오늘날까지 급속한 발전을 거듭하고 있다. 하나의 완전한 반도체를 제조하기 위해서는 매우 다양하고 긴 공정을 거쳐야 한다. 반도체 제조 생산성을 높이기 위하여 공정들이 종료되기 전에 미리 이상(fault)을 발견하기 위한 이상탐지 및 분류(fault detection and classification, FDC)에 대한 많은 연구가 진행되고 있다. 이를 위하여 다양한 반도체 장비에 갖가지 종류의 센서를 부착하여 일정한 시간 간격으로 원하는 값을 측정한다. 이러한 측정 값은 실수 값들의 연속이므로 시계열(time-series) 데이터의 일종이다. 본 논문에서는 반도체 공정에서의 이상탐지 및 클러스터링을 수행하는 알고리즘을 제안한다. 제안된 알고리즘은 시계열 데이터를 심볼릭 표현법(symbolic representation)으로 변환하여 이상을 탐지하는 기존의 알고리즘을 수정한 것이다. 본 논문의 공헌은 일반적인 시계열 데이터에 대한 기존의 이상탐지 알고리즘을 수정하여 반도체 공정 데이터에 대해서도 활용할 수 있음을 보일 뿐만 아니라, 이상탐지 및 클러스터링의 정확성을 높이는 실험 결과를 제시하는 것이다. 실험 결과, 본 논문에서 제안한 알고리즘은 긍정 오류(false positive) 및 부정 오류(false negative)를 모두 발생하지 않았다.

• 반도체디스플레이기술학회지
• /
• 제9권4호
• /
• pp.93-97
• /
• 2010

Fast incipient fault diagnosis is becoming one of the key requirements for economical and optimal process operation management in high-tech industries. Artificial neural networks have been used to detect faults for a number of years and shown to be highly successful in this application area. This paper presents a novel test technique for fault detection and classification for module process of TFT-LCD manufacture using support vector machines (SVMs). In order to evaluate SVMs, this paper examines the performance of the proposed method by comparing it with that of multilayer perception, one of the artificial neural network techniques, based on real benchmarking data.

• 한국반도체및디스플레이장비학회:학술대회논문집
• /
• 한국반도체및디스플레이장비학회 2004년도 춘계학술대회 발표 논문집
• /
• pp.159-162
• /
• 2004

Problems of overlap errors and sidelobe printing by the design rule reduction in the lithography process using attenuated phase-shifting masks(attPSM) have been serious. Overlap errors and sidelobes can be simultaneously solved by the rule-based correction using scattering bars with the rules extracted from test patterns. Process parameters affecting the attPSM lithography simulation have been determined by the fitting method to the process data. Overlap errors have been solved applying the correction rules to the metal patterns overlapped with contact/via. Moreover, the optimal insertion rule of the scattering bars has made it possible to suppress the sidelobes and to get additional pattern fidelity at the same time.

• 산업경영시스템학회지
• /
• 제46권2호
• /
• pp.1-12
• /
• 2023

To make semiconductor chips, a number of complex semiconductor manufacturing processes are required. Semiconductor chips that have undergone complex processes are subjected to EDS(Electrical Die Sorting) tests to check product quality, and a wafer bin map reflecting the information about the normal and defective chips is created. Defective chips found in the wafer bin map form various patterns, which are called defective patterns, and the defective patterns are a very important clue in determining the cause of defects in the process and design of semiconductors. Therefore, it is desired to automatically and quickly detect defective patterns in the field, and various methods have been proposed to detect defective patterns. Existing methods have considered simple, complex, and new defect patterns, but they had the disadvantage of being unable to provide field engineers the evidence of classification results through deep learning. It is necessary to supplement this and provide detailed information on the size, location, and patterns of the defects. In this paper, we propose an anomaly detection framework that can be explained through FCDD(Fully Convolutional Data Description) trained only with normal data to provide field engineers with details such as detection results of abnormal defect patterns, defect size, and location of defect patterns on wafer bin map. The results are analyzed using open dataset, providing prominent results of the proposed anomaly detection framework.

• 산업공학
• /
• 제23권3호
• /
• pp.229-238
• /
• 2010

Virtual metrology (VM), a critical component of semiconductor manufacturing, is an efficient way of assessing the quality of wafers not actually measured. This is done based on a model between equipment sensor data (obtained for all wafers) and the quality characteristics of wafers actually measured. This paper considers principal component regression (PCR), partial least squares regression (PLSR), kernel PCR (KPCR), and kernel PLSR (KPLSR) as VM models. For each regression model, two cases are considered. One utilizes all explanatory variables in developing a model, and the other selects significant variables using the genetic algorithm (GA). The prediction performances of 8 regression models are compared for the short- and long-term etch process data. It is found among others that the GA-KPLSR model performs best for both types of data. Especially, its prediction ability is within the requirement for the short-term data implying that it can be used to implement VM for real etch processes.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 1998년도 제13차 학술회의논문집
• /
• pp.480-483
• /
• 1998

For memory products, it is very important to develop a new production line as soon as possible. All products are inspected to get rid of defected products at the last testing stage. Those inspection data are called FCM. In this paper, based on the FCM data, Area Usage Factor (AUF) analyzing method will be proposed. Process engineers can make up their mind to which direction they should concentrate their analyzing power.