• Journal of the Semiconductor & Display Technology
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• v.15 no.4
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• pp.1-9
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• 2016

The warpage on mobile phone camera packages occurs due to the CTE(Coefficient of Thermal Expansion) mismatch between a thin silicon die and a substrate. The warpage in the optical instruments such as camera module has an effect on the field curvature, which is one of the factors degrading the optical performance and the product yield. In this paper, we studied the effect of die bonding epoxy on the package and optical performance of mobile phone camera packages. We calculated the warpages of camera module packages by using a finite element analysis, and their shapes were in good agreement showing parabolic curvature. We also measured the warpages and through-focus MTF of camera module specimens with experiments. The warpage was improved on an epoxy with low elastic modulus at both finite element analysis and experiment results, and the MTF performance increased accordingly. The results show that die bonding epoxy affects the warpage generated on the image sensor during the packaging process, and this warpage eventually affects the optical performance associated with the field curvature.

• Journal of the Korean Chemical Society
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• v.54 no.5
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• pp.594-602
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• 2010

Since the requirement of the high density integration and thin package technique of semiconductor have been increasing, the main package type of semiconductor will be a chip scale package (CSP). The changes of diffusion coefficient and moisture content ratio of epoxy resin systems according to the change of liquid type epoxy resin and fillers for CSP applications were investigated. The epoxy resins used in this study are RE-304S, RE310S, and HP-4032D, and Kayahard MCD as hardener and 2-methylimidazole as catalyst were used in these epoxy resin systems. The micro-sized and nano-sized spherical type fused silica as filler were used in order to study the moisture absorption properties of these epoxy molding compound (EMC) according to the change of filler size. The temperature of glass transition (Tg) of these EMC was measured using Dynamic Scanning Calorimeter (DSC), and the moisture absorption properties of these EMC according to the change of time were observed at $85^{\circ}C$ and 85% relative humidity condition using a thermo-hygrostat. The diffusion coefficients in these EMC were calculated in terms of modified Crank equation based on Ficks' law. An increase of diffusion coefficient and maximum moisture absorption ratio with Tg in these systems without filler can be observed, which are attributed to the increase of free volume with Tg. In the EMC with filler, the changes of Tg and maximum moisture absorption ratio with the filler content can be hardly observed, however, the diffusion coefficients of these systems with filler content show the outstanding changes according to the filler size. The diffusion via free volume is dominant in the EMC with micro-sized filler; however, the diffusion with the interaction of absorption according the increase of the filler surface area is dominant in the EMC with nano-sized filler.

• Journal of the Microelectronics and Packaging Society
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• v.29 no.3
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• pp.37-42
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• 2022

Recently, the semiconductor package structures are becoming thinner and more complex. As the thickness decrease, interfacial delamination due to material mismatch can be further maximized, so the reliability of interface is a critical issue in industry field. Especially, the polymers, which are widely used in semiconductor packaging, are significantly affected by the temperature and moisture. Therefore, in this study, the delamination prediction at the interface of package structure was performed through finite element analysis considering the moisture absorption and desorption under the various temperature conditions. The material properties such as diffusivity and saturated moisture content were obtained from moisture absorption test. The hygro-swelling coefficients of each material were analyzed through TMA and TGA after the moisture absorption. The micro-shear test was conducted to evaluate the adhesion strength of each interface at various temperatures considering the moisture effect. The finite element analysis of interfacial delamination was performed that considers both deformation due to temperature and moisture absorption. Consequently, the interfacial delamination was successfully predicted in consideration of the in-situ moisture desorption and temperature behavior during the reflow process.

• Journal of the Microelectronics and Packaging Society
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• v.29 no.4
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• pp.83-87
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• 2022

Recently, as the thickness of the semiconductor package becomes thinner, warpage has become a major issue. Since the warpage is caused by differences in material properties between package components, it is essential to precisely evaluate the material properties of the EMC(Epoxy molding compound), one of the main components, to predict the warpage accurately. Especially, the cure shrinkage of the EMC is generated during the curing process, and among them, the effective cure shrinkage that occurs after the gelation point is a key factor in warpage. In this study, the gelation point of the EMC was defined from the dissipation factor measured using the dielectric sensor during the curing process similar with actual semiconductor package. In addition, DSC (Differential scanning calorimetry) test and rheometer test were conducted to analyze the dielectrometry measurement. As a result, the dielectrometry was verified to be an effective method for monitoring the curing status of the EMC. Simultaneously, the strain transition of the EMC during the curing process was measured using the FBG (Fiber Bragg grating) sensor. From these results, the effective cure shrinkage of the EMC during the curing process was measured.

• KIISE Transactions on Computing Practices
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• v.21 no.10
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• pp.645-650
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• 2015

Tester Interface Software (TIS) provides all software functions that are necessary for a testing device to perform the test process on a memory semiconductor package from the time the device is put into the test equipment until the device is discharged from the equipment. TIS should perform the same work over all types of equipment regardless of their tester models. However, TIS has been developed and managed independently of the tester models because there are various equipment and computer models that are used in the test process. Therefore, more maintenance, time and cost are required for development, which adversely affects the quality of the software, and the problem becomes more serious when the new tester model is introduced. In this paper, we propose the Cross-platform Tester Interface Software (CTIS) framework, which can be integrated and operated on heterogeneous equipment and OSs.

• Composites Research
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• v.34 no.1
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• pp.47-50
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• 2021

In this paper, the Curing process for Epoxy Molding Compound (EMC) Package was developed by comparing the performance of the EMC/Cu Bi-layer package manufactured by the conventional Hot Press process system and Carbon Nanotubes (CNT) Heater process system of the surface heating system. The viscosity of EMC was measured by using a rheometer for the curing cycle of the CNT Heater. In the EMC/Cu Bi-layer Package manufactured through the two process methods by mentioned above, the voids inside the EMC was analyzed using an optical microscope. In addition, the interfacial void and warpage of the EMC/Cu Bi-layer Package were analyzed through C-Scanning Acoustic Microscope and 3D-Digital Image Correlation. According to these experimental results, it was confirmed that there was neither void in the EMC interior nor difference in the warpage at room temperature, the zero-warpage temperature and the change in warpage.

• Journal of Korean Institute of Industrial Engineers
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• v.41 no.6
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• pp.579-587
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• 2015

Semiconductor manufacturing industry is a high density integration industry because it generates a vest number of data that takes about 300~400 processes that is supervised by numerous production parameters. It is asked of engineers to understand the correlation between different stages of the manufacturing process which is crucial in reducing production costs. With complex manufacturing processes, and defect processing time being the main cause. In the past, it was possible to grasp the corelation among manufacturing process stages through the engineer's domain knowledge. However, It is impossible to understand the corelation among manufacturing processes nowadays due to high density integration in current semiconductor manufacturing. in this paper we propose a canonical correlation analysis (CCA) using both wafer test voltage variables and fail bit counts variables. using the method we suggested, we can increase the semiconductor yield which is the result of the package test.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.295-301
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• 2011

A triple-band transceiver module for 2.3/2.5/3.5 GHz mobile WiMAX, IEEE 802.16e, applications is introduced. The suggested transceiver module consists of RFIC, reconfigurable/multi-resonance MIMO antenna, embedded PCB, mobile WiMAX base band, memory and channel selection front-end module. The RFIC is fabricated in $0.13{\mu}m$ RF CMOS process and has 3.5 dB noise figure(NF) of receiver and 1 dBm maximum power of transmitter with 68-pin QFN package, $8{\times}8\;mm^2$ area. The area reduction of transceiver module is achieved by using embedded PCB which decreases area by 9% of the area of transceiver module with normal PCB. The developed triple-band mobile WiMAX transceiver module is tested by performing radio conformance test(RCT) and measuring carrier to interference plus noise ratio (CINR) and received signal strength indication (RSSI) in each 2.3/2.5/3.5 GHz frequency.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.471-477
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• 2014

In this paper, a modeling and co-simulation methodology is proposed to predict the radiated electromagnetic interference (EMI) from on-chip switching I/O buffers. The output waveforms of I/O buffers are simulated including the on-chip I/O buffer circuit and the RC extracted on-chip interconnect netlist, package, and printed circuit board (PCB). In order to accurately estimate the EMI, a full-wave 3D simulation is performed including the measurement environment. The simulation results are compared with near-field electromagnetic scan results and far-field measurements from an anechoic chamber, and the sources of emission peaks were analyzed. For accurate far-field EMI simulation, PCB power trace models considering IC switching current paths and external power cable models must be considered for accurate EMI prediction. With the proposed EMI simulation model and flow, the electromagnetic compatibility can be tested even before the IC is fabricated.

• IE interfaces
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• v.25 no.2
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• pp.264-275
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• 2012

The process of semiconductor(IC Package) manufacturing usually includes lots of complex and sequential processes. Many kinds of equipments are installed with the mixed concept of serial and parallel manufacturing system. The business environments of the semiconductor industry have been changed frequently, because new technologies are developed continuously. It is the main reason of new investment plan and layout consideration. However, it is difficult to change the layout after installation, because the major equipments are expensive and difficult to move. Furthermore, it is usually a multiple-objective problem. Thus, new investment or layout change should be carefully considered when the production environments likewise product mix and production quantity are changed. This paper introduces a simulation case study of a Korean company that produces packaging substrates(especially lead frames) and requires multi-objective decision support. $QUEST^{(R)}$ is used for simulation modelling and AHP(Analytic Hierarchy Process) and DEA(Data Envelopment Analysis) are used for weighting of qualitative performance measures and solving multiple-objective layout problem, respectively.