• 한국자기학회:학술대회 개요집
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• 한국자기학회 2005년도 동계학술연구발표회 및 2차 아시안포럼
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• pp.216-216
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• 2005

• 한국시뮬레이션학회:학술대회논문집
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• 한국시뮬레이션학회 2003년도 추계학술대회 및 정기총회
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• pp.147-151
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• 2003

Yield enhancement in semiconductor fabrication is important. Even though DRAM yield loss may be attributed to many problems, the existence of defects on the wafer is one of the main causes. When the defects on the wafer form patterns, it is usually an indication for the identification of equipment problems or process variations. In this paper describes the techniques to automatically classify a failure pattern using a fail bit map.

• Safety and Health at Work
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• 제10권3호
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• pp.347-354
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• 2019

Background: The aim of this study was to describe the types of diseases that developed in semiconductor workers who have registered with the Korea Workers' Compensation and Welfare Service (KWCWS) and to identify potential common occupational characteristics by the type of claimed disease. Methods: A total of 55 semiconductor workers with cancer or rare diseases who claimed to the KWCWS were compared based on their work characteristics and types of claimed diseases. Leukemia, non-Hodgkin lymphoma, and aplastic anemia were grouped into lymphohematopoietic (LHP) disorder. Results: Leukemia (n = 14) and breast cancer (n = 10) were the most common complaints, followed by brain cancer (n = 6), aplastic anemia (n = 6), and non-Hodgkin lymphoma (n = 4). LHP disorders (n = 24) accounted for 43%. Sixty percent (n = 33) of registered workers (n = 55) were found to have been employed before 2000. Seventy-six percent (n = 42) of registered workers and 79% (n = 19) among the registered workers with LHP (n = 24) were found to be diagnosed at a relatively young age, ${\leq}40years$. A total of 18 workers among the registered semiconductor workers were finally determined to deserve compensation for occupational disease by either the KWCWS (n = 10) or the administrative court (n = 8). Eleven fabrication workers who were compensated responded as having handled wafers smaller than eight inches in size. Eight among the 18 workers compensated (44 %) were found to have ever worked at etching operations. Conclusion: The distribution of cancer and rare diseases among registered semiconductor workers was closely related to the manufacturing era before 2005, ${\leq}8$ inches of wafer size handled, exposure to clean rooms of fabrication and chip assembly operations, and etching operations.

• 한국산업보건학회지
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• 제25권2호
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• pp.202-210
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• 2015

Objectives: The purpose of this study was to examine clean room(C/R) structure, air conditioning and contamination control systems and to provide basic information for identifying a correlation between the semiconductor work environment and workers' disease. Methods: This study was conducted at 200 mm and 300 mm semiconductor wafer fabrication facilities. The C/R structure and air conditioning method were investigated using basic engineering data from documentation for C/R construction. Furthermore, contamination parameters such as airborne particles, temperature, humidity, acids, ammonia, organic compounds, and vibration in the C/R were based on the International Technology Roadmap for Semiconductors(ITRS). The properties of contamination control systems and the current status of monitoring of various contaminants in the C/R were investigated. Results: 200 mm and 300 mm wafer fabrication facilities were divided into fab(C/R) and sub fab(Plenum), and fab, clean sub fab and facility sub fab, respectively. Fresh air(FA) is supplied in the plenum or clean sub fab by the outdoor air handling unit system which purifies outdoor air. FA supply or contaminated indoor air ventilation rates in the 200 mm and 300 mm wafer fabrication facilities are approximately 10-25%. Furthermore, semiconductor clean rooms strictly controlled airborne particles(${\leq}1,000{\sharp}/ft^3$), temperature($23{\pm}0.5^{\circ}C$), humidity($45{\pm}5%$), air velocity(0.4 m/s), air change(60-80 cycles/hr), vibration(${\leq}1cm/s^2$), and differential pressure(atmospheric pressure$+1.0-2.5mmH_2O$) through air handling and contamination control systems. In addition, acids, alkali and ozone are managed at less than internal criteria by chemical filters. Conclusions: Semiconductor clean rooms can be a pleasant environment for workers as well as semiconductor devices. However, based on the precautionary principle, it may be necessary to continuously improve semiconductor processes and the work environment.

• 한국시뮬레이션학회논문지
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• 제26권4호
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• pp.43-49
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• 2017

우리나라의 반도체와 디스플레이 산업의 발전으로 해당 분야에 대한 인력 수급이 더욱 활발해지고 있다. 이에 따라 학부의 반도체 수업에서는 기존의 이론에 최신 기술 동향뿐만 아니라 현장 중심형 실무 인재 양성을 위해 반도체 제작 공정도 심도 있게 다루고 있다. 하지만, 반도체 공정은 클린룸 안에 설치된 장비들과 고가의 재료들이 필요하기 때문에 대규모로 진행되는 학부 교육에서 공정 실습이 제공되기는 어렵다. 이 한계를 극복하기 위해 실제 공정이나 공정 이론을 시각화한 동영상 등이 보조 자료로서 사용되고 있으나, 실습으로 대체할 교보재로서는 부족하다. 본 연구에서는 이론 중심의 학부 교육에 간접적인 반도체 공정 실습을 제공하기 위해 3차원 기반의 가상 클린룸을 구현하고, 반도체 공정에서 가장 많이 사용되는 노광 장비에 대한 시뮬레이터를 구현하여 사진 공정 베이에 설치하였다. 본 연구에서 구현하는 공정 시뮬레이터는 학부 교육에서 다루는 이론을 시각화하는데 중점을 두었으며, 포토 마스크와 실리콘 웨이퍼의 정렬과 노광 공정의 진행 따른 감광제의 국부적 변화를 시각화하였다. 개발된 시뮬레이터는 모바일 기기 등과 같은 저성능의 컴퓨팅 환경에서도 실행될 수 있도록 메모리 사용을 최소화하여 실용성을 극대화 하였다.

• Safety and Health at Work
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• 제2권1호
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• pp.39-51
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• 2011

Objectives: This study was designed to evaluate exposure levels of various chemicals used in wafer fabrication product lines in the semiconductor industry where work-related leukemia has occurred. Methods: The research focused on 9 representative wafer fabrication bays among a total of 25 bays in a semiconductor product line. We monitored the chemical substances categorized as human carcinogens with respect to leukemia as well as harmful chemicals used in the bays and substances with hematologic and reproductive toxicities to evaluate the overall health effect for semiconductor industry workers. With respect to monitoring, active and passive sampling techniques were introduced. Eight-hour long-term and 15-minute short-term sampling was conducted for the area as well as on personal samples. Results: The results of the measurements for each substance showed that benzene, toluene, xylene, n-butyl acetate, 2-methoxy-ethanol, 2-heptanone, ethylene glycol, sulfuric acid, and phosphoric acid were non-detectable (ND) in all samples. Arsine was either "ND" or it existed only in trace form in the bay air. The maximum exposure concentration of fluorides was approximately 0.17% of the Korea occupational exposure limits, with hydrofluoric acid at about 0.2%, hydrochloric acid 0.06%, nitric acid 0.05%, isopropyl alcohol 0.4%, and phosphine at about 2%. The maximum exposure concentration of propylene glycol monomethyl ether acetate (PGMEA) was 0.0870 ppm, representing only 0.1% or less than the American Industrial Hygiene Association recommended standard (100 ppm). Conclusion: Benzene, a known human carcinogen for leukemia, and arsine, a hematologic toxin, were not detected in wafer fabrication sites in this study. Among reproductive toxic substances, n-butyl acetate was not detected, but fluorides and PGMEA existed in small amounts in the air. This investigation was focused on the air-borne chemical concentrations only in regular working conditions. Unconditional exposures during spills and/or maintenance tasks and by-product chemicals were not included. Supplementary studies might be required.

• 산업경영시스템학회지
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• 제39권1호
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• pp.73-80
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• 2016

This study focuses on the formation of input release lots in a semiconductor wafer fabrication facility. After the order-lot pegging process assigns lots in the fab to orders and calculates the required quantity of wafers for each product type to meet customers' orders, the decisions on the formation of input release lots should be made to minimize the production costs of the release lots. Since the number of lots being processed in the wafer fab directly is related to the productivity of the wafer fab, the input lot formation is crucial process to reduce the production costs as well as to improve the efficiency of the wafer fab. Here, the input lot formation occurs before every shift begins in the semiconductor wafer fab. When input quantities (of wafers) for product types are given from results of the order-lot pegging process, lots to be released into the wafer fab should be formed satisfying the lot size requirements. Here, the production cost of a homogeneous lot of the same type of product is less than that of a heterogeneous lot that will be split into the number of lots according to their product types after passing the branch point during the wafer fabrication process. Also, more production cost occurs if a lot becomes more heterogeneous. We developed a multi-dimensional dynamic programming algorithm for the input lot formation problem and showed how to apply the algorithm to solve the problem optimally with an example problem instance. It is necessary to reduce the number of states at each stage in the DP algorithm for practical use. Also, we can apply the proposed DP algorithm together with lot release rules such as CONWIP and UNIFORM.

• 한국재료학회지
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• 제30권10호
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• pp.558-565
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• 2020

AZO thin films are grown on a p-Si(111) substrate by RF magnetron sputtering. The characteristics of various thicknesses and heat treatment conditions are investigated by X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), Hall effect and room-temperature photoluminescence (PL) measurements. The substrate temperature and the RF power during growth are kept constant at 400 ℃ and 200 W, respectively. AZO films are grown with a preferred orientation along the c-axis. As the thickness and the heat treatment temperature increases, the length of the c-axis decreases as Al³⁺ ions of relatively small ion radius are substituted for Zn²⁺ ions. At room temperature, the PL spectrum is separated into an NBE emission peak around 3.2 eV and a violet regions peak around 2.95 eV with increasing thickness, and the PL emission peak of 300 nm is red-shifted with increasing annealing temperature. In the XPS measurement, the peak intensity of Al_2p and O_ll increases with increasing annealing temperature. The AZO thin film of 100 nm thickness shows values of 6.5 × 10¹⁹ cm^-3 of carrier concentration, 8.4 cm^-2/V·s of mobility and 1.2 × 10^-2 Ω·cm electrical resistivity. As the thickness of the thin film increases, the carrier concentration and the mobility increase, resulting in the decrease of resistivity. With the carrier concentration, mobility decreases when the heat treatment temperature increases more than 500 ℃.

• 한국시뮬레이션학회논문지
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• 제19권3호
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• pp.45-54
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• 2010

반도체 제조공정에 내재된 복잡성은 작업일정(job scheduling) 문제를 해석적 방법으로는 풀기 어렵기 때문에 보통 시스템 파라미터의 변화에 대한 효과를 이산사건 모델링 시뮬레이션에 의존하여 왔다. 한편 장비 고장 등 예측 불가능한 사건들은 고정된 작업일정 기법을 사용할 경우 전체 공정의 효율을 악화시킨다. 따라서 이러한 불확실성에 대해 최적의 성능을 내기 위해서는 작업일정을 실시간으로 대처 변경하는 것이 필요하다. 본 논문은 반도체 제조 공정에 대해 시스템 제어관점의 접근방법을 적용하여 이 문제에 적응형 실시간 작업제어 틀을 제안하고, DEVS 모델링 시뮬레이션 환경을 기반으로 제안된 틀을 설계 구현하였다. 제안된 방법은 기존의 임기응변적인 소프트웨어적인 방법에 비추어볼 때 전체 시스템을 이해하기 쉬우면서도 또한 추가되는 작업제어 규칙도 쉽게 추가 적용할 수 있는 유연성을 장점으로 가지고 있다. 여러 가지 실험결과 제안된 적응형 실시간 작업제어 프레임워크는 고정 작업규칙 방법에 비해 훨씬 나은 결과를 보여주어 그 효용성을 입증하였다.

• Composites Research
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• 제20권5호
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• pp.49-55
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• 2007

반도체 쿼츠 웨이퍼 다이싱용 블레이드는 마이크로/나노 디바이스와 부품을 제조하기 위해 고정밀도의 가공성을 요구한다. 따라서 균일한 마이크로/나노 선폭의 가공을 위해서는 블레이드의 제작 단계에서 균일한 두께와 밀도를 유지하는 것이 중요하다. 기존의 실리콘웨이퍼 가공을 위해서는 금속의 블레이드가 사용되고 있지만 쿼츠 웨이퍼 가공을 위해서는 고분자 복합재가 사용된다. 이러한 복합재는 가공성, 전기전도성, 그리고 적절한 강도와 연성 및 마모저항성이 있어야 한다. 그러나 기존의 건식성형 공정으로는 균일성을 유지하기 위해 많은 공정과 비용이 소비되고 있다. 본 연구에서는 도전성 나노 세라믹스 분말, 연마재 세라믹스 분말에 열경화성 수지, 전도성 고분자를 혼합한 복합재 분말을 습식성형 공정에 의해 제조, 평가하는 연구를 수행하였다. 먼저 복합재 분말을 액상과 혼합하여 블레이드를 제작하였으며, 액상의 종류, 액상 건조공정의 영향을 고찰하였다. 평가는 마이크로미터 측정기와 현미경을 이용하여 두께를 측정하였다. 두께편차와 기공률, 밀도, 경도, 등의 특성을 비교, 평가하였다. 그 결과 습식성형에 의해 블레이드의 두께편차를 감소시킬 수 있었으며, 경도 등의 특성을 향상시킬 수 있었다.