• Journal of the Semiconductor & Display Technology
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• v.9 no.4
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• pp.13-18
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• 2010

Extreme ultraviolet (EUV) lithography using 13.5 nm wavelengths is expected to be adopted as a mass production technology for 32 nm half pitch and below. One of the new issues introduced by EUV lithography is the shadowing effect. Mask shadowing is a unique phenomenon caused by using mirror-based mask with an oblique incident angle of light. This results in a horizontal-vertical (H-V) biasing effect and ellipticity in the contact hole pattern. To minimize the shadowing effect, a refilled mask is an available option. The concept of refilled mask structure can be implemented by partial etching into the multilayer and then refilling the trench with an absorber material. The simulations were carried out to confirm the possibility of application of refilled mask in 32 nm line-and-space pattern under the condition of preproduction tool. The effect of sidewall angle in refilled mask is evaluated on image contrast and critical dimension (CD) on the wafer. We also simulated the effect of refilled absorber thickness on aerial image, H-V CD bias, and overlapping process window. Finally, we concluded that the refilled absorber thickness for minimizing shadowing effect should be thinner than etched depth.

• Journal of the Semiconductor & Display Technology
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• v.10 no.1
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• pp.91-94
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• 2011

This paper presents light transmission efficiency by optical adhesive thickness between MLA and aperture layer and by aperture hole size. The gap between MLA and Aperture layer is adjusted by the shim. The more optical adhesive thickness increases, the better light transmission efficiency increases up to a point. After that, the light transmission efficiency decreases because stray lights cannot transmit through the aperture layer owing to cut-off by aperture layer. And as a result of light transmission efficiency with changing aperture hole size, the light transmission efficiency is proportional to area of aperture hole. The more specified process is made, the better data and sample will be got.

• Journal of Sensor Science and Technology
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• v.33 no.3
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• pp.173-178
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• 2024

Development of pressure sensors for harsh environments with high pressure, humidity, and temperature is essential for many applications in the aerospace, marine, and automobile industries. However, existing materials such as polymers, adhesives, and semiconductors are not suitable for these conditions and require materials that are less sensitive to the external environment. This study proposed a pressure sensor that could withstand harsh environments and had high durability and precision. The sensor comprised a piezoresistor pattern and an insulating film directly formed on a stainless-steel membrane. To achieve the highest sensitivity, a pattern design method was proposed that considered the stress distribution in a circular membrane using finite element analysis. The manufacturing process involved depositing and etching a dielectric insulating film and metal piezoresistive material, resulting in a device with high linearity and slight hysteresis in the range of a maximum of 40 atm. The simplicity and effectiveness of this sensor render it a promising candidate for various applications in extreme environments.

• Applied Chemistry for Engineering
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• v.20 no.1
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• pp.99-103
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• 2009

HBr and $O_2$ in $Cl_2$ gas ambient for the high density plasma gate etching has been used to increase the performance of gate electrode in semiconductor devices. When an un-doped amorphous silicon layer was used for a gate electrode material, the notching profile was observed at the outer sidewall foot of the outermost line. This phenomenon can be explained by the electron shading effect: i.e., electrons are captured at the photoresist sidewall while ions pass through the photoresist sidewall and reach the oxide surface at a narrowly spaced pattern during the over etch step. The potential distribution between gate lines deflects the ions trajectory toward the gate sidewall. In this study, an appropriate mechanism was proposed to explain the occurrence of notching in the gate electrode of un-doped amorphous silicon.

• Korean Journal of Materials Research
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• v.34 no.6
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• pp.303-308
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• 2024

The semiconductor and display industries require the development of plasma resistant materials for use in high density plasma etching process equipment. Yttria (Y₂O₃) is a ceramic material mainly used to ensure good plasma resistance properties, which requires a dense microstructure. In commercial production, a sintering process is applied to reduce the sintering temperature of Y₂O₃. In this study, the effect of the addition of glass frit to the sintered specimen was examined when manufacturing yttria sintered specimens for semiconductor process equipment parts. The Y₂O₃ specimen was shaped into a Ø50 mm size and then sintered at 1,600 ℃ for 1~8 h. The characteristics, X-ray diffraction pattern, densities, contraction rate of the specimen, and swelling of the surface of the Y₂O₃ specimens were investigated as a function of the sintering time and glass frit addition. The Y₂O₃ specimen exhibited a density of over 4.9 g/cm³ as the sintering time increased, and the swelling phenomenon characteristics were improved by glass frit, by controlling particle size.

• Journal of the Korean Society for Precision Engineering
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• v.31 no.11
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• pp.969-974
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• 2014

Previously fabricated electronic devices were used for vacuum manufacturing processes such as conventional semiconductor manufacturing. However, they are difficult to apply to continuous processes such as roll-to-roll printing, which results in very high device manufacturing and processing costs. Therefore, many developers have been interested in applying continuous processes to contact printing or noncontact printing technologies and they proposed various continuous printing techniques instead of conventional batch coating. In this paper, we proposed improved gravure offset printing process as one of the contact printing technique. We used etching pattern geometry with soft core blanket roll for printing of ultra fine line below the 10um.Using this technique we obtained flexible metal grid mesh film as transparent conductive film.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2004.04a
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• pp.466-471
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• 2004

In focused-ion-beam (FIB) application of micromachining and device transplantation, four kinds of FIB processes, namely FIB sputtering, FIB-induced etching, redeposition, and FIB-induced deposition, are well utilized. As with FIB systems, scanning electron microscopes(SEMs) were extensively used in the semiconductor industry. They are the tools of choice for defect review and providing the image resolution needed for process monitoring. The enhanced capabilities of a dual-column on one chamber system are quickly becoming realized by the nano industry for performing a wide range of application.

• Journal of Korean Institute of Industrial Engineers
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• v.27 no.4
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• pp.394-405
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• 2001

Since most real-world application data involve continuous-valued attributes, properly addressing the discretization process for constructing a decision tree is an important problem. A continuous-valued attribute is typically discretized during decision tree generation by partitioning its range into two intervals recursively. In this paper, by removing the restriction to the binary discretization, we present a hybrid multi-interval discretization algorithm for discretizing the range of continuous-valued attribute into multiple intervals. On the basis of experiment using semiconductor etching machine, it has been verified that our discretization algorithm constructs a more efficient incremental decision tree compared to previously proposed discretization algorithms.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.206-209
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• 2002

With the progress of semiconductor processing technology, avalanohe photodiodes (APDs) based on InP/InGaAs are used for high-speed optical receiver modules. Planar-type APDs give higher reliability than mesa-type APDs. However, Planar-type APDs are struggled with a problem of intensed electric field at the junction curvature, which causes edge breakdown phenomena at the junction periphery. In this paper, we focused on studying the effects of junction curvature for APDs performances by different etching processes followed by single diffusion to from p-n junction. The performance of each process is characterized by observing electric field profiles and carrier generation rates. From the results, it can be understood to predict the optimum structure, which can minimize edge breakdown and improve the manufacturability.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.934-937
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• 1999

MMIC 제작을 위한 단일 반도체 공정으로써 PECVD를 이용한 Si₃N₄의 증착, RIE를 이용한 CaAs via-hole건식식각, 그리고 airbridge 공정조건을 위한 실험 및 분석 작업을 수행하였다. Si₃N₄의 증착 실험에서는 굴절률이 2인 조건을, GaAs via-hole 식각 실험에서는 최적화된 thru-via의 모양과 식각률을 갖는 조건을, airbridge 실험에서는 polyimide coating 및 건식 식각 조건과 금 도금 및 습식 식각의 최적 조건들을 찾아내었다.