• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.472-472
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• 2011

The capacitive coupled plasma (CCP) has been extensively used in the semiconductor industry because it has not only good uniformity, but also low electron temperature. But CCP source has some problems, such as difficulty in varying the ion bombardment energy separately, low plasma density, and high processing pressure, etc. In this reason, dual frequency CCP has been investigated with a separate substrate biasing to control the plasma parameters and to obtain high etch rate with high etch selectivity. Especially, in this study, we studied on the etching of $SiO_2$ by using the pulse-time modulation in the dual-frequency CCP source composed of 60 MHz/ 2 MHz rf power. By using the combination of high /low rf powers, the differences in the gas dissociation, plasma density, and etch characteristics were investigated. Also, as the size of the semiconductor device is decreased to nano-scale, the etching of contact hole which has nano-scale higher aspect ratio is required. For the nano-scale contact hole etching by using continuous plasma, several etch problems such as bowing, sidewall taper, twist, mask faceting, erosion, distortions etc. occurs. To resolve these problems, etching in low process pressure, more sidewall passivation by using fluorocarbon-based plasma with high carbon ratio, low temperature processing, charge effect breaking, power modulation are needed. Therefore, in this study, to resolve these problems, we used the pulse-time modulated dual-frequency CCP system. Pulse plasma is generated by periodical turning the RF power On and Off state. We measured the etch rate, etch selectivity and etch profile by using a step profilometer and SEM. Also the X-ray photoelectron spectroscopic analysis on the surfaces etched by different duty ratio conditions correlate with the results above.

• Journal of Information Display
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• 제13권2호
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• pp.61-66
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• 2012

The double-layered Ti/Si barrier metal is demonstrated for the source/drain Cu interconnections in oxide semiconductor thin-film transistors (TFTs). The transmission electromicroscopy and ion mass spectroscopy analyses revealed that the double-layered barrier structure suppresses the interfacial reaction and the interdiffusion at the interface after thermal annealing at $350^{\circ}C$. The underlying Si layer was found to be very useful for the etch stopper during wet etching for the Cu/Ti layers. The oxide TFTs with a double-layered Ti/Si barrier metal possess excellent TFT characteristics. It is concluded that the present barrier structure facilitates the back-channel-etch-type TFT process in the mass production line, where the four- or five-mask process is used.

• 한국산학기술학회논문지
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• 제9권2호
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• pp.327-332
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• 2008

본 논문에서는 반도체 소자와 디스플레이 패널의 제조공정에 사용되는 플라즈마 식각장비의 RF 정합특성을 개선하기 위한 모듈을 제안하였다. 구동부의 기구 중 베벨기어를 웜기어로 새롭게 설계 제작하고 제어부도 원칩 마이크로 프로세서를 이용하여 재구성하였다. 개발된 모듈은 기존의 정합장치보다 다양한 공정변수에 대한 능동적인 대처가 가능하고, 모터의 흐름현상 등을 개선함으로서 RF 정합특성이 개선되어, 플라즈마 식각공정의 생산성을 향상시킬 수 있음을 보였다.

• ETRI Journal
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• 제16권1호
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• pp.45-57
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• 1994

The effects of reactive ion etching (RIE) of $SiO_2$ layer in $CHF_3/C_2F_6$ on the underlying Si surface have been studied by X-ray photoelectron spectroscopy (XPS), secondary ion mass spectrometer, Rutherford backscattering spectroscopy, and high resolution transmission electron microscopy. We found that two distinguishable modified layers are formed by RIE : (i) a uniform residue surface layer of 4 nm thickness composed entirely of carbon, fluorine, oxygen, and hydrogen with 9 different kinds of chemical bonds and (ii) a contaminated silicon layer of about 50 nm thickness with carbon and fluorine atoms without any observable crystalline defects. To search the removal condition of the silicon surface residue, we monitored the changes of surface compositions for the etched silicon after various post treatments as rapid thermal anneal, $O_2$, $NF_3$, $SF_6$, and $Cl_2$ plasma treatments. XPS analysis revealed that $NF_3$ treatment is most effective. With 10 seconds exposure to $NF_3$ plasma, the fluorocarbon residue film decomposes. The remained fluorine completely disappears after the following wet cleaning.

• 마이크로전자및패키징학회지
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• 제25권2호
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• pp.35-39
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• 2018

광결합 효율(Fiber coupling efficiency)을 개선하기 위해서는 Laser diode에서 넓은 각도로 방출된 빛을 광섬유의 중심(Core) 부분으로 모아주는 집광렌즈(Collimating lens)가 필수적이다. 현재 사용되는 집광렌즈는 형틀(Mold)을 이용한 글래스 몰드(Glass mold) 공법이 널리 사용되고 있다. 이 방식은 생산단가가 저렴하지만, 정교한 성형이 어렵고 구면수차와 같은 품질문제가 있다. 본 연구는 기존의 글래스 몰드 공법을 반도체 공정으로 대체함으로써 표면 가공의 정밀도를 높이고, 렌즈의 재질 또한 반도체 공정에 적합한 실리콘으로 변경하였다. 반도체공정은 PR을 이용한 포토리소그래피(Photolithography) 공정과 플라즈마를 이용한 건식 식각(Dry etching) 공정으로 구성된다. 광결합 효율은 실리콘 렌즈의 광학적 특성을 평가하기 위해 초정밀 정렬 시스템을 사용하여 측정되었다. 그 결과, 렌즈 직경 $220{\mu}m$ 일 때의 최대 광결합 효율은 50%로 측정되었고, 렌즈 직경 $210-240{\mu}m$ 범위에서는 최고 광결합 효율 대비 5% 이하의 광결합 특성저하를 보여줌을 확인하였다.

• 전기학회논문지
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• 제66권8호
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• pp.1230-1235
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• 2017

We studied surface texture-etching of glass substrate by using reactive ion etching process with various working pressure (0.7~9.0 mT). With the increase in the pressure, a haze parameter, which means diffusive transmittance/total transmittance, was increased in overall wavelength regions, as measured by spectrophotometer. Also, atomic force microscopy (AFM) study also showed that the surface topography transformed from V-shaped, keen surface to U-shaped, flattened surface, which is beneficial for nanocrystalline silicon semiconductor growth with suppressing defective crack formation. The texture-etched ZnO:Al combined with textured glass exhibited pronounced haze properties that showed 60~90 % in overall spectral wavelength regions. This promising optical properties of double textured, transparent conducting substrate can be widely applied in silicon thin film photovoltaics and other optoelectronic devices.

• 한국산학기술학회논문지
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• 제19권4호
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• pp.650-656
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• 2018

TFT-LCD 산업은 반도체와 유사한 공정기술을 갖는 대규모 장치 산업으로 일종의 Giant Microelectronics 산업이다. 습식 에칭(Wet Etching)은 전체 TFT 공정에서 비교적 큰 비중을 차지하고 있지만 발표된 연구사례는 부족한 실정이다. 그 주요 원인은 반응이 일어나는 에칭액(Etchant) 성분이 기업의 비밀로 간주되어 외부에 발표되는 사례가 거의 없기 때문이다. 최근 대면적 LCD 제조를 위하여 사용되는 알루미늄(Al)과 구리(Cu)는 습식 에칭을 진행하기에 매우 까다로운 물질이다. 저 저항성 재료인 Cu는 습식 에칭 공정에서만 가능하며 높은 속도와 낮은 실패율, 적은 소비전력으로 Al 에칭 대용으로 사용하고 있다. 그리고 에칭액으로 사용하는 과산화수소($H_2O_2$)의 이상 반응으로 추가적인 배관 및 전기적인 안전장치가 필요하다. 본 논문에서는 과산화수소의 이상 반응을 제한하지는 못하나 이상 반응 발생 시 설비의 피해를 최소화 할 수 있는 방법을 제안한다. 또한 최근에 알루미늄 에칭설비에서 구리 에칭설비로 변경하는 사례가 많아 구리 에칭설비에 대한 하드웨어 인터록을 제안하고 안전 등급이 높은 안전 PLC로 구현하여 이상 반응에 대한 대비책을 강구하는 방안을 제안한다.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2010년도 춘계학술발표대회
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• pp.49.1-49.1
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• 2010

The particle generation during the plasma enhanced process is highly considered as serious problem in the semiconductor manufacturing industry. The material for the plasma processing chamber requires the plasma etching characteristics which are homogeneously etched surface and low plasma etching depth for preventing particulate contamination and high durability. We found that the materials without grain boundaries can prevent the particle generation. Therefore, the amorphous material with the low plasma etching rate may be the best candidate for the plasma processing chamber instead of the polycrystalline materials such as yttria and alumina. Three glasses based on $SiO_2$ and $Al_2O_3$ were prepared with various rare-earth elements (Gd, Y and La) which are same content in the glass. The glasses were plasma etched in the same condition and their plasma etching rate was compared including reference materials such as Si-wafer, quartz, yttria and alumina. The mechanical and thermal properties of the glasses were highly related with cationic field strength (CFS) of the rare-earth elements. We assumed that the plasma etching resistance may highly contributed by the thermal properties of the fluorine byproducts generated during the plasma exposure and it is expected that the Gd containing glass may have the highest plasma etching resistance due to the highest sublimation temperature of $GdF_3$ among three rare-earth elements (Gd, Y and La). However, it is found that the plasma etching results is highly related with the mechanical property of the glasses which indicates the cationic field strength. From the result, we conclude that the glass structure should be analyzed and the plasma etching test should be conducted with different condition in the future to understand the plasma etching behavior of the glasses perfectly.

• 반도체디스플레이기술학회지
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• 제20권3호
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• pp.27-31
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• 2021

VI probe, which is one of various in-situ plasma monitoring sensor, is frequently used for in-situ process monitoring in mass production environment. In this paper, we correlated the plasma etch results with VI probe data with the small amount of gas flow rate changes to propose usefulness of the VI probe in real-time process monitoring. Several different sized contact holes were employed for the etch experiment, and the etched profiles were measured by scanning electron microscope (SEM). Although the shape of etched hole did not show satisfactory relationship with VI probe data, the chamber status changed along the incremental/decremental modification of the amount of gas flow was successfully observed in terms of impedance monitoring.

• Journal of Information Display
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• 제2권4호
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• pp.1-7
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• 2001

This paper investigates the characteristics of a newly developed high density hollow cathode plasma(HCP) system and its application for the etching of silicon wafers. We used $SF_6$ and $O_2$ gases in the HCP dry etch process. This paper demonstrates very high plasma density of $2{\times}10^{12}cm^{-3}$ at a discharge current of 20 rna, Silicon etch rate of 1.3 ${\mu}m$/min was achieved with $SF_6/O_2$ plasma conditions of total gas pressure of 50 mTorr, gas flow rate of 40 seem, and RF power of200W. This paper presents surface etching characteristics on a crystalline silicon wafer and large area cast type multicrystlline silicon wafer. We obtained field emitter tips size of less than 0.1 ${\mu}m$ without any photomask step as well as with a conventional photolithography. Our experimental results can be applied to various display systems such as thin film growth and etching for TFT-LCDs, emitter tip formations for FEDs, and bright plasma discharge for PDP applications. In this research, we studied silicon etching properties by using the hollow cathode plasma system.