• Title/Summary/Keyword: Security design

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Novel Design of Ultrashort Pulse Excimer Laser Amplifier System I (Energy Characteristics)

  • Lee, Young-Woo
    • Journal of information and communication convergence engineering
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    • v.1 no.1
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    • pp.39-43
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    • 2003
  • The technology required to advance the state of the art of ultra-high-intensity excimer amplifier construction to the 100 J/100fs output pulse level is identified. The preliminary design work for very large final amplifier pumped by electron beam module is described, and key design problems and approaches are presented and discussed in detail based on the recent experimental and theoretical results.

A Study of Quality-based Software Architecture Design Model under Web Application Development Environment (품질기반 웹 애플리케이션 개발을 위한 소프트웨어아키텍쳐 설계절차 예제 정립)

  • Moon, Song Chul;Noh, Si Choon
    • Convergence Security Journal
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    • v.12 no.4
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    • pp.115-122
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    • 2012
  • As the most common application development of software development time, error-free quality, adaptability to frequent maintenance, such as the need for large and complex software challenges have been raised. When developing web applications to respond to software reusability, reliability, scalability, simplicity, these quality issues do not take into account such aspects traditionally. In this situation, the traditional development methodology to solve the same quality because it has limited development of new methodologies is needed. Quality of applications the application logic, data, and architecture in the entire area as a separate methodology can achieve your goals if you do not respond. In this study secure coding, the big issue, web application factors to deal with security vulnerabilities, web application architecture, design procedure is proposed. This proposal is based on a series of ISO/IEC9000, a web application architecture design process.

A Design of AES-based CCMP Core for IEEE 802.11i Wireless LAN Security (IEEE 802.11i 무선 랜 보안을 위한 AES 기반 CCMP Core 설계)

  • Hwang Seok-Ki;Lee Jin-Woo;Kim Chay-Hyeun;Song You-Soo;Shin Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.4
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    • pp.798-803
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    • 2005
  • This paper describes a design of AES(Advanced Encryption Standard)-based CCMP core for IEEE 802.1li wireless LAN security. To maximize its performance, two AES cores ate used, one is for counter mode for data confidentiality and the other is for CBC(Cipher Block Chaining) mode for authentication and data integrity. The S-box that requires the largest hardware in AES core is implemented using composite field arithmetic, and the gate count is reduced by about $20\%$ compared with conventional LUT(Lookup Table)-based design. The CCMP core designed in Verilog-HDL has 13,360 gates, and the estimated throughput is about 168 Mbps at 54-MHz clock frequency. The functionality of the CCMP core is verified by Excalibur SoC implementation.

Security Enhancing of Authentication Protocol for Hash Based RFID Tag (해쉬 기반 RFID 태그를 위한 인증 프로토콜의 보안성 향상)

  • Jeon, Jin-Oh;Kang, Min-Sup
    • Journal of Internet Computing and Services
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    • v.11 no.4
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    • pp.23-32
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    • 2010
  • In this paper, we first propose the security enhancing of authentication protocol for Hash based RFID tag, and then a digital Codec for RFID tag is designed based on the proposed authentication protocol. The protocol is based on a three-way challenge response authentication protocol between the tags and a back-end server. In order to realize a secure cryptographic authentication mechanism, we modify three types of the protocol packets which defined in the ISO/IEC 18000-3 standard. Thus active attacks such as the Man-in-the-middle and Replay attacks can be easily protected. In order to verify effectiveness of the proposed protocol, a digital Codec for RFID tag is designed using Verilog HDL, and also synthesized using Synopsys Design Compiler with Hynix $0.25\;{\mu}m$ standard-cell library. Through security analysis and comparison result, we will show that the proposed scheme has better performance in user data confidentiality, tag anonymity, Man-in-the-middle attack prevention, replay attack, forgery resistance and location tracking.

Design of Area-efficient Feature Extractor for Security Surveillance Radar Systems (보안 감시용 레이다 시스템을 위한 면적-효율적인 특징점 추출기 설계)

  • Choi, Yeongung;Lim, Jaehyung;Kim, Geonwoo;Jung, Yunho
    • Journal of IKEEE
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    • v.24 no.1
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    • pp.200-207
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    • 2020
  • In this paper, an area-efficient feature extractor was proposed for security surveillance radar systems and FPGA-based implementation results were presented. In order to reduce the memory requirements, features extracted from Doppler profile for FFT window-size are used, while those extracted from total spectrogram for frame-size are excluded. The proposed feature extractor was design using Verilog-HDL and implemented with Xilinx Zynq-7000 FPGA device. Implementation results show that the proposed design can reduce the logic slice and memory requirements by 58.3% and 98.3%, respectively, compared with the existing research. In addition, security surveillance radar system with the proposed feature extractor was implemented and experiments to classify car, bicycle, human and kickboard were performed. It is confirmed from these experiments that the accuracy of classification is 93.4%.

A Design of AES-based CCMP Core for IEEE 802.11i Wireless LAN Security (IEEE 802.11i 무선 랜 보안을 위한 AES 기반 CCMP Core 설계)

  • Hwang, Seok-Ki;Lee, Jin-Woo;Kim, Chay-Hyeun;Song, You-Soo;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.1
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    • pp.367-370
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    • 2005
  • This paper describes a design of AES(Advanced Encryption Standard)-based CCMP core for IEEE 802.11i wireless LAN security. To maximize its performance, two AES cores are used, one is for counter mode for data confidentiality and the other is for CBC(Cipher Block Chaining)mode for authentication and data integrity. The S-box that requires the largest hardware in AES core is implemented using composite field arithmetic, and the gate count is reduced by about 25% compared with conventional LUT(Lookup Table)-based design. The CCMP core designed in Verilog-HDL has 15,450 gates, and the estimated throughput is about 128 Mbps at 50-MHz clock frequency). The functionality of the CCMP core is verified by Excalibur SoC implementation.

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Effect of Shifting the Pole-shoe and Damper-bar Centerlines on the No-load Voltage Waveform of a Tubular Hydro-generator

  • Fan, Zhen-nan;Han, Li;Liao, Yong;Xie, Li-dan;Wen, Kun;Wang, Jun;Dong, Xiu-cheng;Yao, Bing
    • Journal of Electrical Engineering and Technology
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    • v.13 no.3
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    • pp.1294-1303
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    • 2018
  • This study optimises the no-load voltage waveform of tubular hydro-generators by a simple design scheme. For different centerlines of the pole shoe and damper bar, the optimisation effects on the no-load voltage waveform are investigated in two tubular hydro-generators with different weighted powers (34 MW and 18 MW). The results are compared with those of the traditional stator-slots skewed design. The quality of the no-load voltage waveform was related to the shifting degree, and the different optimisation effects between the integer slot generator (q = 2) and the fractional slot generator (q = 11/2) were analysed. This research can improve the quality of the power output and no-load voltage waveform, and provide an effective reference for improving the industrial design and manufacture level of tubular hydro-generators.

A Practical Design and Implementation of Android App Cache Manipulation Attacks (안드로이드 앱 캐시 변조 공격의 설계 및 구현)

  • Hong, Seok;Kim, Dong-uk;Kim, Hyoungshick
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.29 no.1
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    • pp.205-214
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    • 2019
  • Android uses app cache files to improve app execution performance. However, this optimization technique may raise security issues that need to be examined. In this paper, we present a practical design of "Android app cache manipulation attack" to intentionally modify the cache files of a target app, which can be misused for stealing personal information and performing malicious activities on target apps. Even though the Android framework uses a checksum-based integrity check to protect app cache files, we found that attackers can effectively bypass such checks via the modification of checksum of the target cache files. To demonstrate the feasibility of our attack design, we implemented an attack tool, and performed experiments with real-world Android apps. The experiment results show that 25 apps (86.2%) out of 29 are vulnerable to our attacks. To mitigate app cache manipulation attacks, we suggest two possible defense mechanisms: (1) checking the integrity of app cache files; and (2) applying anti-decompilation techniques.

MTS Service Environmental Quality's Effects on the Customer Satisfaction and Continuous Use Intention in the Agile Business Environment (애자일 경영 환경에서의 모바일증권거래시스템 서비스 환경 품질이 고객만족과 지속적 사용의도에 미치는 영향)

  • Chang, Hwan-Shick;Noh, Hye-Young;Kim, Dae-Cheol
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.42 no.3
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    • pp.131-141
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    • 2019
  • Recently the business environment surrounding the financial investment industry is changing rapidly, and the demands of customers (diversity and the cycle of change etc.) are getting shorter. In this context, it can be said that companies are forced to adopt an agile management environment. In particular, non-face-to-face channels, including MTS, is adopting the agile system into the digital finance sector from a company-wide and strategic perspective. This study analyzed the effects of MTS services' environment quality on customer satisfaction and continuous intention to use for MTS users who are rapidly increasing under the agile management environment in the financial investment industry. This study surveyed the quality of service environment (accessibility, convenience, design, security), customer satisfaction, and continuous intention to use for 350 MTS users. First, accessibility, convenience, and security of MTS service environment quality had a positive effect on customer satisfaction, and design was rejected Second, customer satisfaction has a positive effect on continuous intention to use. Third, convenience and security of MTS service environment quality have positive effects on continuous intention to use, and accessibility and design were rejected. The results of this study, together with demographic analysis, are expected to provide useful implications for MTS activation studies and securities firms' strategies.

Research on Science DMZ scalability for the high performance research data networking (연구데이터의 고성능 네트워킹을 위한 Science DMZ 확장성 연구)

  • Lee, Chankyun;Jang, Minseok;Noh, Minki;Seok, Woojin
    • KNOM Review
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    • v.22 no.2
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    • pp.22-28
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    • 2019
  • A Science DeMilitarized Zone (DMZ) is an optimized network technology tailored to research data nature. The Science DMZ guarantees end-to-end network performance by forming a closed research network without redundant networking and security devices for the authorized researchers. Data Transfer Node (DTN) is an essential component for the high performance and security of the Science DMZ, since only transfer functions of research data are allowed to the DTN without any security- and performance-threatening functions such as commercial internet service. Current Science DMZ requires per-user DTN server installation which turns out a scalability limitation of the networks in terms of management overhead, entry barrier of the user, and networks-wise CAPEX. In order to relax the aforementioned scalability issues, this paper suggests a centralized DTN design where end users in a group can share the centralized DTN. We evaluate the effectiveness of the suggested sharable DTN design by comparing CAPEX against to that of current design with respect to the diverse network load and the state-of-the-art computing machine.