• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.43-45
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• 2000

For motion estimation, the block matching algorithm is widely used to improve the compression ratio of low bit-rate motion video. As a newly developed fast search algorithm, the nearest-neighbors search technique has a drawback of degrading video quality while providing fisher speed in search process. In this paper, a modified nearest-neighbors search algorithm is proposed in which a double rectangular shaped search-candidate area is used to improve video quality in encoding process with a small increasing of search time. To evaluate the proposed algorithm. other methods based on the nearest-neighbors search algorithm are investigated.

• Journal of the Korean Society for information Management
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• v.29 no.1
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• pp.175-190
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• 2012

This study aims to investigate the current status of mobile search functions of Korean search portals, namely Google Korea, Naver, Nate, Daum, and Yahoo Korea. This study focuses on unique mobile search functionalities, such as voice search, music search, code search, and visual/ object search. In particular, this study analyzed characteristics of these search functions and evaluated their performances based on the accuracy and the speed of recognition. The results of this study show that both Naver and Daum support various mobile searching functions, whereas Google only supports voice search. Nate and Yahoo do not offer any unique function. The results of this study can be applied to the portal's effective development of mobile search functionalities.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.2B
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• pp.71-79
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• 2006

Address lookup is an essential function in the Internet routers, and it determines overall router performance. In this paper, we have thoroughly investigated the binary-search-based address lookup algorithms and proposed a new algorithm based on binary search on prefix lengths. Most of the existing binary search schemes perform binary search on prefix values, and hence the lookup speed is proportional to the length of prefixes or the log function of the number of prefixes. The previous algorithm based on binary search on prefix lengths has superior lookup performance than others. However, the algorithm requires very complicated pre-computation of markers and best matching prefixes in internal nodes since naive binary search is not possible in their scheme. This complicated pre-computation makes the composition of the routing table and incremental update very difficult. By using leaf-pushing, the proposed algorithm in this paper removes the complicated pre-computation of the Previous work in performing the binary search on prefix lengths. The performance evaluation results show that the proposed scheme has very good performance in lookup speed compared with previous works.

• Journal of Information Processing Systems
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• v.14 no.5
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• pp.1237-1253
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• 2018

Harmony search algorithm is an emerging meta-heuristic optimization algorithm, which is inspired by the music improvisation process and can solve different optimization problems. In order to further improve the performance of the algorithm, this paper proposes an improved harmony search algorithm. Key parameters including harmonic memory consideration (HMCR), pitch adjustment rate (PAR), and bandwidth (BW) are optimized as the number of iterations increases. Meanwhile, referring to the genetic algorithm, an improved method to generate a new crossover solutions rather than the traditional mechanism of improvisation. Four complex function optimization and pressure vessel optimization problems were simulated using the optimization algorithm of standard harmony search algorithm, improved harmony search algorithm and exploratory harmony search algorithm. The simulation results show that the algorithm improves the ability to find global search and evolutionary speed. Optimization effect simulation results are satisfactory.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.1
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• pp.170-178
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• 2004

In this work a high speed 8-error correcting Reed-Solomon decoder is designed using the modified Euclid algorithm. Decoding algorithm of Reed-Solomon codes consists of four steps, those are, compute syndromes, find error-location polynomials, decide error-locations, and determine error values. The decoding speed is increased and the latency is reduced by using the parallel architecture in the syndrome generator and a faster clock speed in the modified Euclid algorithm block. In addition. the error locator polynomial in Chien search block is separated into even and odd terms to increase the overall speed of the decoder. All the functionalities of the decoder are verified first through C++ programs. Verilog is used for hardware description, and then the decoder is synthesized with a $.25{\mu}m$ CMOS TML library. The functionalities of the chip is also verified through test vectors. The clock speed of the chip is 250MHz, and the maximum data rate is 1Gbps.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.12
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• pp.110-119
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• 1996

A novel high speed VLSI architecture and its VLSI realization methodologies for a motion estimation processor based on full search block matching algorithm are presentd. The presented architecture is designed in order to be suitable for highly parallel and pipelined processing with identical PE's and adjustable in performance and hardware amount according to various application areas. Also, the throughput is maximized by enhancing PE utilization up to 100% and the chip pin count is reduced by reusing image data with embedded image memories. Also, the uniform and identical data processing structure of PE's eases VLSI implementation and the clock rate of external I/O data can be made slower compared to internal clock rate to resolve I/O bottleneck problem. The logic and spice simulation results of the proposed architecture are presented. The performances of the proposed architecture are evaluated and compared with other architectures. Finally, the chip layout is shown.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.5 no.1
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• pp.21-28
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• 2005

This paper proposes a new method for accelerating the search speed of genetic algorithms by taking derivative evaluation and conditional random selection into account in their evolution process. Derivative evaluation makes genetic algorithms focus on the individuals whose fitness is rapidly increased. This accelerates the search speed of genetic algorithms by enhancing exploitation like steepest descent methods but also increases the possibility of a premature convergence that means most individuals after a few generations approach to local optima. On the other hand, derivative evaluation under a premature convergence helps genetic algorithms escape the local optima by enhancing exploration. If GAs fall into a premature convergence, random selection is used in order to help escaping local optimum, but its effects are not large. We experimented our method with one combinatorial problem and five complex function optimization problems. Experimental results showed that our method was superior to the simple genetic algorithm especially when the search space is large.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.6
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• pp.603-607
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• 2008

This paper proposes a fast acquisition method using INS velocity and multiple correlators for high speed vehicles. In order to reduce acquisition time in GPS receiver, the method utilizes inertial velocity information and multiple correlators. Search range of the Doppler frequency is reduced by using INS velocity and the number of cells at one search can be increased by using multiple correlators. By using both multiple correlators and the INS velocity in the acquisition, search space can be greatly reduced. Experimental results show that the method gives faster signal acquisition performance than the conventional method.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.269-272
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• 2001

Since Multi-way Search Tree reduces the number of the memory access by increasing the branch factor, it is considered a method to archive the high-speed IP address lookup. Using the combination of initial 16 bit may and Multi-way Search Tree, it also reduces the search time of If address lookup. Multi-way Search Tree consists of K keys and K＋1 key pointers. This paper shows how the E update of Multi-way Search Tree which consists of the one pointer within a node can be performed. Using the one pointer within a node, it increases the number of keys within a node and reduces the search time of IP lookup. We also describes IP updating methods such as modification, Insertion and Deletion of address entries. Our update scheme performs better than the method which rebuilds the entire IP routing table when IP update processes.

• Journal of Information Processing Systems
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• v.15 no.2
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• pp.433-439
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• 2019

Artificial bee colony algorithm is a strong global search algorithm which exhibits excellent exploration ability. The conventional ABC algorithm adopts employed bees, onlooker bees and scouts to cooperate with each other. However, its one dimension and greedy search strategy causes slow convergence speed. To enhance its performance, in this paper, we abandon the greedy selection method and propose an artificial bee colony algorithm with special division and intellective search (ABCIS). For the purpose of higher food source research efficiency, different search strategies are adopted with different employed bees and onlooker bees. Experimental results on a series of benchmarks algorithms demonstrate its effectiveness.