• Proceedings of the Korea Institute of Fire Science and Engineering Conference
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• 2007.11a
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• pp.79-84
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• 2007

• Proceedings of the SAREK Conference
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• 2006.11a
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• pp.23-23
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• 2006

• Architectural research
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• v.18 no.4
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• pp.171-178
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• 2016

Architectural utility in Richard Neutra's early twentieth century modern school design was paramount in progressively shaping salience of academic institutions, in part to move beyond neoclassical traditions in style based design. The intention being to address school and community through modern architectural solutions. Expanding on Neutra's practice, the planning and design of new public schools in Los Angeles, are advocating the integration of institutional and public spaces. This research will document through qualitative analysis of institutional design within transitioning neighborhoods, a utilitarian approach that has become foundational for positive urban change. The focus of this research will reflect upon contemporary schools designed by DalyGenik Architecture, Coop Himmelblau and Michael Maltzen Architecture. Comparing with Neutra's early modernist approach, the selected case studies will address material and spatial applications having redefined functional relationships of interior space, architectural envelope and an interconnected public realm. A dynamic peripheral condition in new school design has emerged with the elimination of decorative adornment, clarifying utilitarian intentions of institutional service to and the rejuvenation of public realms and community spaces.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.663-664
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• 2006

This paper presents a reconfigurable digital signal processing(rDSP) architecture that is effective for implementing adaptive digital signal processing in the applications of smart health care system. This rDSP architecture employs an evolution capability of FIR filters using genetic algorithm. Parallel genetic algorithm based rDSP architecture evolves FIR filters to explore optimal configuration of filter combination, associated parameters, and structure of feature space adaptively to noisy environments for an adaptive signal processing. The proposed DSP architecture is implemented using Xilinx Virtex4 FPGA device and SMIC 0.18um CMOS Technology.

• Journal of the Korean Institute of Rural Architecture
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• v.13 no.1
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• pp.55-62
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• 2011

The purpose of this study is to clarify the actual condition of real certification schools of environment-friendly architecture per ecological environment elements through extracting ecological environment elements which is possible to analyze in quantity certification standards of environment friendly architecture. As the method of this study, firstly, certification as an examination on certification system of environment-friendly architecture, summary of certification system of environment-friendly architecture and eco-school pilot model project, ecological environment elements which is possible for quantitative analysis of ecological environment certification standards were extracted. Secondly, actual condition of ecological environment elements per school grade by collecting actual data of certification schools environment-friendly architecture were analyzed. The average of ecological area ratio was 24.5 percent in case of this certification regardless of school grade and region and it was analyzed that the natural based green area ratio was 22.9 percent, bio-tope area ratio was 0.60 percent and ecological learning places area ratio was 0.39 percent.

• Journal of information and communication convergence engineering
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• v.17 no.2
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• pp.117-127
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• 2019

In software engineering, to ensure reliability between systems, describing both system architecture and assurance arguments between system elements is considered necessary. There are proposals for system architecture assurance, but use of these traditional methods often requires development of different diagrams using different editors. Because the visual sense of the traditional methods is inadequate, errors readily occur when manipulating different diagrams. Therefore, it is essential that the assurance of dependability between components and systems is visualized and easy to understand. In this paper, an integrated approach to describe the relationship between system actors and system architecture is proposed, and this approach is clarified using an enterprise architecture modeling language. A case study is carried out and comparison to the traditional approach $d^*$ framework is explained. The comparison results show that the proposed approach is more suitable for ensuring dependability in system architecture.

• Steel and Composite Structures
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• v.38 no.3
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• pp.241-255
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• 2021

In order to study the interfacial bond-slip behavior of steel reinforced recycled concrete (SRRC) under cyclic loading, thirteen specimens were designed and tested under cyclic loading and one under monotonic loading. The test results indicated that the average bond strength of SRRC decreased with the increasing replacement ratio of recycled concrete, whereas the bond strength increased with an increase in the concrete cover thickness, the volumetric stirrup ratio, and the strength of recycled concrete. The ultimate bond strength of the cyclically-loaded specimen was significantly (41%) lower than that of the companion monotonically-loaded specimen. The cyclic phenomena also showed that SRRC specimens went through the nonslip phase, initial slip phase, failure phase, bond strength degradation phase and residual phase, with all specimens exhibiting basically the same shape of the bond-slip curve. Additionally, the paper presents the equations that were developed to calculate the characteristic bond strength of SRRC, which were verified based on experimental results.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.451-454
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• 2004

The reconfigurable architecture is increasingly important for design of multi-mode communication systems and computation-intensive DSP systems. The proposed coarse-grain architecture is based on a reconfigurable processing element consisting of a MAC unit, a register file, a context data register, and PE interconnect control blocks. The main feature of the Proposed architecture is the loop context which enables faster configuration. Also, we propose another area-efficient reconfigurable architecture with improved reconfigurability. The SystemC modeling results show that the proposed architecture can reduce 9 clock cycles of 2D DCT compared to existing architectures.

• Proceedings of the SAREK Conference
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• 2004.06a
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• pp.112-112
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• 2004

• Proceedings of the Korea Institute of Fire Science and Engineering Conference
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• 2005.11a
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• pp.49-56
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• 2005