• Journal of the Korean Society for Nondestructive Testing
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• v.36 no.5
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• pp.353-362
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• 2016

Thermal barrier coating (TBC) is an essential element consisting of a super-alloy base and ceramic coating designed to achieve long operational time under a high temperature and pressure environment. However, the top coat of TBC can be delaminated at certain temperatures with long operation time. As the delamination of TBC is directly related to the blade damage, the coupling status of the TBC should be assured for reliable operation. Conventional studies of nondestructive evaluation have been made for detecting generation of thermally grown oxide (TGO) or qualitatively evaluating delamination in TBC. In this study, the ultrasonic C-scan method was developed to obtain the damage map inside TBC by estimating the delamination in a quantitative way. All specimens were isothermally degraded at $1,100^{\circ}C$ with different time, having different partial delamination area. To detect partial delamination in TBC, the C-scan was performed by a single transducer using pulse-echo method with normal incidence. Partial delamination coefficients of 1 mm to 6 mm were derived by the proportion of the surface reflection signal and flaw signal which were theoretical signals using Rogers-Van Buren and Kim's equations. Using the partial delamination coefficients, the partial delamination maps were obtained. Regardless of the partial delamination coefficient, partial delamination area was increased when degradation time was increased in TBC. In addition, a decrease in partial delamination area in each TBC specimen was observed when the partial delamination coefficient was increased. From the portion of the partial delamination maps, the criterion for delamination was derived.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.2
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• pp.14-25
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• 1999

The IEEE standard 1149.1, which was proposed to increase the observability and the controllability in I/O pins, makes it possible the board level testing. In the boundary-scan environments, many shift operations are required due to their serial nature. This increases the test application time and the test application costs. To reduce the test application time, the method based on the parallel opereational multiple scan paths was proposed, but this requires the additional I/O pins and the internal wires. Moreover, it is difficult to make the designs in conformity to the IEEE standard 1149.1 since the standard does not support the parallel operation of data shifts on the scan paths. In this paper, the multiple scan path access algorithm which controls two scan paths simultaneously with one test bus is proposed. Based on the new algorithm, the new algorithm, the new board level BIST architecture which has a relatively small area overhead is developed. The new BIST architecture can reduce the test application time since it can shift the test patterns and the test responses of two scan paths at a time. In addition, it can reduce the costs for the test pattern generation and the test response analysis.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.11
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• pp.1307-1314
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• 2012

To reduce the effects of clutters with subsurface inhomogenities in ground-penetrating radar(GPR) images, an eigenimage based signal-processing technique is presented. If the conventional eigenimage filtering technique is applied to B-scan images of a GPR survey, relatively homogeneous clutters such as antenna ringing, direct coupling between transmitting and receiving antennas, and soil-surface reflection, can be removed sufficiently. However, since random clutters of subsurface inhomogenities still remain in the images, target signals are distorted and obscured by the clutters. According to a comparison of the eigenimage filtering results, there is different coherency between subsurface clutters and target signals. To reinforce the pixels with high coherency and reduce the pixels with low coherency, the pixel-by-pixel geometric-mean process after the eigenimage filtering is proposed here. For the validity of the proposed approach, GPR survey for detection of a metal target in a randomly inhomogeneous soil is numerically simulated by using a random media generation technique and the finite-difference time-domain(FDTD) method. And the proposed signal processing is applied to the B-scan data of the GPR survey. We show that the proposed approach provides sufficient enhancement of target signals as well as remarkable reduction of subsurface inhomogeneous clutters in comparison with the conventional eigenimage filtering.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.1295-1298
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• 2004

Selective Laser Sintering(SLS) method is one of Rapid Prototyping(RP) technologies. It is used to fabricate desirable part to sinter powder and stack the fabricated layer. To develop this SLS machine, it needs effective scanning path and the development of scanning device. This paper shows how to make fast scanning path with respect to scan spacing, laser beam size and scanning direction from 2-dimensional sliced file generated in commercial CAD/CAM software. Also, we develop the scanning device and its control algorithm to precisely follow the generated scanning path. Scanning path affects precision and total machining time of the final fabricated part. Sintering occurs using infrared laser which has high thermal energy. As a result, shrinkage and curling of the fabricated part occurs according to thermal distribution. Therefore, fast scanning path generation is needed to eliminate the factors of quality deterioration. It highly affects machining efficiency and prevents shrinkage and curling by relatively lessening the thermal distribution of the surface of sintering layer. To generate this fast scanning path, adaptive path generation is needed with respect to the shape of each layer, and not simply x, y scanning, but the scanning of arbitrary direction must be enabled. This paper addresses path generation method to focus on fast scanning, and development of scanning system and control algorithm to precisely follow generated path.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.10a
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• pp.409-410
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• 2006

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 1999.10a
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• pp.269-274
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• 1999

This paper aims to DNC application of car fuel tank die working. DNC system is consist of CAD, CAM software and CNC milling machine. CAM software is purpose to G-code generation for CNC programming. Then CAM software and CNC milling machine are connect to RS-232-C cable for networking.

• Proceedings of the KSRS Conference
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• 2003.11a
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• pp.1343-1345
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• 2003

An internal wave observation experiment by SAR in South China Sea is described. Two scenes of Radarsat ScanSAR images were acquired. Internal solitary waves are found in all the two images. It is concluded that these internal waves are generated in Bashi channel. Relationship between internal wave generation and tide is studied based on analyzing of tidal data of Legaspi in Philippine. Using ocean environmental data of this sea area internal waves’ amplitude and wave speed are detected by SAR images.

• Proceedings of the Korea Information Processing Society Conference
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• 2007.05a
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• pp.31-33
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• 2007

Devising an efficient one-pass frequent pattern mining algorithm has been an issue in data mining research in recent past. Pattern growth algorithms like FP-Growth which are found more efficient than candidate generation and test algorithms still require two database scans. Moreover, FP-growth approach requires rebuilding the base-tree while mining with different support counts. In this paper we propose an item-based tree, called I-Tree that not only efficiently mines frequent patterns with single database scan but also provides multiple mining scopes with multiple support thresholds. The 'build-once-mine-many' property of I-Tree allows it to construct the tree only once and perform mining operation several times with the variation of support count values.

• The Journal of Korea Robotics Society
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• v.4 no.4
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• pp.298-304
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• 2009

This paper describes an algorithm that improves 3D reconstruction result using a multi-sensor fusion disparity map. We can project LRF (Laser Range Finder) 3D points onto image pixel coordinatesusing extrinsic calibration matrixes of a camera-LRF (${\Phi}$, ${\Delta}$) and a camera calibration matrix (K). The LRF disparity map can be generated by interpolating projected LRF points. In the stereo reconstruction, we can compensate invalid points caused by repeated pattern and textureless region using the LRF disparity map. The result disparity map of compensation process is the multi-sensor fusion disparity map. We can refine the multi-sensor 3D reconstruction based on stereo vision and LRF using the multi-sensor fusion disparity map. The refinement algorithm of multi-sensor based 3D reconstruction is specified in four subsections dealing with virtual LRF stereo image generation, LRF disparity map generation, multi-sensor fusion disparity map generation, and 3D reconstruction process. It has been tested by synchronized stereo image pair and LRF 3D scan data.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.2
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• pp.157-169
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• 2013

Scale Invariant Feature Transform (SIFT) generates image features widely used to match objects in different images. Previous work on hardware-based SIFT implementation requires excessive internal memory and hardware logic [1]. In this paper, a new hardware organization is proposed to implement SIFT with less memory and hardware cost than the previous work. To this end, a parallel Gaussian filter bank is adopted to eliminate the buffers that store intermediate results because parallel operations allow all intermediate results available at the same time. Furthermore, the processing order is changed from the raster-scan order to the block-by-block order so that the line buffer size storing the source image is also reduced. These techniques trade the reduction of memory size with a slight increase of the execution time and external memory bandwidth. As a result, the memory size is reduced by 94.4%. The proposed hardware for SIFT implementation includes the Descriptor generation block, which is omitted in the previous work [1]. The addition of the hardwired descriptor generation improves the computation speed by about 30 times when compared with the previous work.