• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.413-416
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• 2000

본논문에서는 유도전동기 속도 및 토크 제어시 고조파의 왜형률을 감소시키고 디지털 구현이 용이하며 선형제어 영역을 증가시킬 수 있는 스위칭 방식으로 Space voltage Vector PWM(Pulse Width Modulation) 설명하였으며 시뮬레이션하기 위한 user_tool로써 Matlab/Simulink를 이용하여 SVPWM을 구현하는 방법을 설명하였다 결과적으로 개루프 운전 시 유도기에 인가되는 기준전압을 각각 비과변조와 과변조 시 전압비율 변경방식을 사용하여 나타나는 응답으로 가상스위칭 시간 T1, T2, T0 와 속도, 상전류, 토크응답을 알아보았다.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1729-1750
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• 2018

Voltage source inverters (VSIs) are widely used to drive induction motors in industry applications. The quality of output waveforms depends on the switching sequences used in pulse width modulation (PWM). In this work, all existing optimal space vector pulse width modulation (SVPWM) switching strategies are studied. The performance of existing SVPWM switching strategies is optimized to realize a tradeoff between quality of output waveforms and switching losses. This study generalizes the existing optimal switching sequences for total harmonic distortions (THDs) and switching losses for different modulation indexes and reference angles with a parameter called quality factor. This factor provides a common platform in which the THDs and switching losses of different SVPWM techniques can be compared. The optimal spatial distribution of each sequence is derived on the basis of the quality factor to minimize harmonic current distortions and switching losses in a sector; the result is the minimum ripple loss SVPWM (MRSLPWM). By employing the sequences from optimized switching maps, the proposed method can simultaneously reduce THDs and switching losses. Two hybrid SVPWM techniques are proposed to reduce line current distortions and switching losses in motor drives. The proposed hybrid SVPWM strategies are MRSLPWM 30 and MRSLPWM 90. With a low-cost PIC microcontroller (PIC18F452), the proposed hybrid SVPWM techniques and the quality of output waveforms are experimentally validated on a 2 kVA VSI based on a three-phase two-level insulated gate bipolar transistor.

• Journal of Industrial Technology
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• v.21 no.A
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• pp.51-57
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• 2001

In this paper, a novel overmodulation strategy for space-rector PWM(SYPWM) inverters to utilize dc link voltage fully is presented. The proposed strategy uses the concept of SVPWM based on the zero sequence signal(offset voltage) injection principle. So, by modifying the pole voltage simply, the linear control of inverter output voltage over the whole overmodulation range can be achieved easily. The proposed strategy is so simple that its practical implementation is easy. The validity of the proposed strategy is confirmed by the experimental results.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.274-277
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• 1999

The paper describes a implementation of space vector pulse-width modulation (SVPWM) voltage source inverter using Field Programmable Gate Array(FPGA) for a induction motor control system. The implemented chip is included logic circuits for SVPWM, dead time compensation and speed detection using Quick Logic, QL16X24B. The maximum operating frequency and delay time can be set to 110MHz and 6 nsec. The designed FPGA for SVPWM can be incorporated with a digital signal processing to provide a simple and effective solution for high performance voltage source inverter drives. Simulation and Implementation results are shown to verify the usefulness of FPGA as a Application Specific Integrated Circuit(ASIC) in power electronics applications

• Journal of Power Electronics
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• v.14 no.1
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• pp.61-73
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• 2014

Multiphase machines are characterized by high power density, enhanced fault-tolerant capacity, and low torque pulsation. For a voltage source inverter supplied multiphase machine, the probability of load imbalances becomes greater and unwanted low-order stator voltage harmonics occur. This paper deals with the PWM control of multiphase inverters under unbalanced load conditions and it proposes a novel near-five-vector SVPWM algorithm based on the five-phase six-leg inverter. The proposed algorithm can output symmetrical phase voltages under unbalanced load conditions, which is not possible for the conventional SVPWM algorithms based on the five-phase five-leg inverters. The cause of extra harmonics in the phase voltages is analyzed, and an xy coordinate system orthogonal to the ${\alpha}{\beta}z$ coordinate system is introduced to eliminate low-order harmonics in the output phase voltages. Moreover, the digital implementation of the near-five-vector SVPWM algorithm is discussed, and the optimal approach with reduced complexity and low execution time is elaborated. A comparison of the proposed algorithm and other existing PWM algorithms is provided, and the pros and cons of the proposed algorithm are concluded. Simulation and experimental results are also given. It is shown that the proposed algorithm works well under unbalanced load conditions. However, its maximum modulation index is reduced by 5.15% in the linear modulation region, and its algorithm complexity and memory requirement increase. The basic principle in this paper can be easily extended to other inverters with different phase numbers.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.1406-1409
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• 2004

The Resolver usually used in industry is the absolute angle analog sensor that must be in order to driving BLDC (brushless DC) motor, and it needs RDC(Resolver-to-Digital converter) for changing the output signal to digital to be applied to the SVPWM(Space Vector Pulse Width Modulation) algorithm. Commonly used S/W RDC needs trigonometric function. What it takes a lot of calculation time of processor is gotten at weak point. In this paper, S/W RDC is realized except trigonometric functions as a result of feedback resolver outputs after filtering using FIR filter. thus, processing time is reduced. So, One-chip DSP Controller operating the Vector Control, RDC, and SVPWM can be designed.

• Journal of Power Electronics
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• v.1 no.1
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• pp.36-47
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• 2001

The carrier-based space vector pulse width modulation(SVPWM), which is considered as highly simple and efficient PWM technology, can be also used in multilevel inverters. The method was originally designed for the two-level inverter and developed to the diode clamped multilevel inverter structure. however it may be noted that it also cause bad switch utilization in cascaded multilevel inverter. This paper introduces an improved carrier-based SVPWM scheme, which is fully suitable for cascaded multilevel inverter topologies because it can achieve the optimized switch utilization through the redistribution of the triangular carrier waves considering leg voltage redundancies while having the advantages of the conventional carrier-based SVPWM. Using simulation and experimental results, the superior performance of new PWM method is shown.

• Journal of Industrial Technology
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• v.21 no.B
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• pp.59-66
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• 2001

In this paper, a novel overmodulation strategy for PWM inverters to extend linearity region is presented. The proposed strategy uses the concept of space-vector PWM(SVPWM) based on the zero sequence signal(offset voltage) injection principle. So, by modifying the pole voltage simply, the linear control of inverter output voltage over the whole overmodulation range can be achieved easily. The proposed strategy is so simple that its practical implementation is easy. The validity of the proposed strategy is confirmed by the experimental results.

• Journal of Power Electronics
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• v.19 no.1
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• pp.146-157
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• 2019

The inverter is an essential part of permanent magnet synchronous motor (PMSM) drive systems. The performance of an inverter is greatly influenced by its modulation strategy. Using a proper management of modulation strategies can guarantee high performance from a PMSM under various speed conditions. Switching between modulations is a pivotal technique that determines the performance of a PMSM. Most works on hybrid methods focus on two-level induction motors drive systems. In this paper, in order to improve the performance of PMSMs under various speed conditions, a hybrid method of a pulse width modulation (PWM) control scheme based on a neutral-point-clamped (NPC) three level topology was proposed. This hybrid PWM modulation comprised space vector PWM (SVPWM) and selective harmonic elimination PWM (SHEPWM). Under low speed conditions, the SVPWM is employed to cause the PMSM to start smoothly, and to obtain a rapid response from the control system. Under high speed conditions, the SHEPWM is employed to reduce the switching frequency and to eliminate particular current harmonics. Moreover, the harmonic characteristics of different modulations are analyzed to obtain a smooth transition between the SHEPWM and the SVPWM. Experimental and simulation results indicated the effectiveness of the proposed control method.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.6
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• pp.488-493
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• 2014

This paper presents a carrier-based pulse-width modulation(PWM) method for reducing the common-mode voltage of a three-level four-leg converter. The idea of the proposed PWM method is intuitive and easy to be implemented in digital signal processor-based converter control systems. On the basis of the analysis of space-vector PWM(SVPWM) and sinusoidal PWM(SPWM) switching patterns, the fourth leg pole voltage of the three-phase converter called "f leg pole voltage" is manipulated to reduce the common-mode voltage. To synthesize f leg pole voltage for the suppression of the common-mode voltage, positive and negative pole voltage references of f leg are calculated. An offset voltage is also deduced to prevent the distortion of a, b, and c phase voltages. The feasibility of the proposed PWM method is verified by simulation and experimental results. The common-mode voltage of the proposed PWM method in peak-to-peak value is 33% in comparison with that of the conventional SVPWM method. The transition number of the common-mode voltage is also reduced to 25%.