• 제목/요약/키워드: SSCG(Spread Spectrum Clock Generation

검색결과 3건 처리시간 0.021초

A Spread Spectrum Clock Generator for SATA II with Rounded Hershey-Kiss Modulation Profile

  • Moon, Yong-Hwan;Lim, Wan-Sik;Kim, Tae-Ho;Kang, Jin-Ku
    • 전기전자학회논문지
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    • 제15권2호
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    • pp.129-133
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    • 2011
  • A spread spectrum clock generation is an efficient way to reduce electro-magnetic interference (EMI) radiation in modern mixed signal chip systems. The proposed circuit generates the spread spectrum clock by directly injecting the modulation voltage into the voltage-controlled oscillator (VCO) current source for SATA II. The resulting 33KHz modulation profile has a Hersey-Kiss shape with a rounded peak. The chip has been fabricated using $0.18{\mu}m$ CMOS process and test results show that the proposed circuit achieves 0.509% (5090ppm) down spreading at 1.5GHz and peak power reduction of 10dB. The active chip area is 0.36mm ${\times}$ 0.49mm and the chip consumes 30mW power at 1.5GHz.

A Two-Point Modulation Spread-Spectrum Clock Generator With FIR-Embedded Binary Phase Detection and 1-Bit High-Order ΔΣ Modulation

  • Xu, Ni;Shen, Yiyu;Lv, Sitao;Liu, Han;Rhee, Woogeun;Wang, Zhihua
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권4호
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    • pp.425-435
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    • 2016
  • This paper describes a spread-spectrum clock generation method by utilizing a ${\Delta}{\Sigma}$ digital PLL (DPLL) which is solely based on binary phase detection and does not require a linear time-to-digital converter (TDC) or other linear digital-to-time converter (DTC) circuitry. A 1-bit high-order ${\Delta}{\Sigma}$ modulator and a hybrid finite-impulse response (FIR) filter are employed to mitigate the phase-folding problem caused by the nonlinearity of the bang-bang phase detector (BBPD). The ${\Delta}{\Sigma}$ DPLL employs a two-point modulation technique to further enhance linearity at the turning point of a triangular modulation profile. We also show that the two-point modulation is useful for the BBPLL to improve the spread-spectrum performance by suppressing the frequency deviation at the input of the BBPD, thus reducing the peak phase deviation. Based on the proposed architecture, a 3.2 GHz spread-spectrum clock generator (SSCG) is implemented in 65 nm CMOS. Experimental results show that the proposed SSCG achieves peak power reductions of 18.5 dB and 11 dB with 10 kHz and 100 kHz resolution bandwidths respectively, consuming 6.34 mW from a 1 V supply.

확산 스펙트럼 생성기를 이용한 적외선 카메라의 방사노이즈 저감에 관한 연구 (Reduction of Radiated Emission of an Infrared Camera Using a Spread Spectrum Clock Generator)

  • 최봉준;이용춘;윤주현;김은준
    • 한국전자파학회논문지
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    • 제27권12호
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    • pp.1097-1104
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    • 2016
  • 적외선 카메라는 Mil-Std-461 항목 중 복사성 방사 잡음 시험, RE-102의 규격 만족에 어려움을 겪는다. 특히 무인항공기용 전자장비의 경우 차폐 케이블을 사용하지 않아 전자기적합성 규격 만족이 어려워 적절한 대응 설계가 필요하다. 무인정찰기용 적외선 카메라의 RE-102 시험 중 50~200 MHz 대역에서 30 dBuV/m 이상 규격을 초과하는 방사 잡음을 확인하였다. Pcb em scan 결과, 디지털 제어 신호 클록의 체배 주파수에 의한 첨두 잡음 발생을 확인하였고, 카메라의 제어 클록에 3 % 다운 스프레딩 방식의 확산 스펙트럼 클록 생성기를 적용하여 방사 잡음이 최대 22.9 dBuV/m 감소함을 확인하였다.