• 한국전기전자재료학회논문지
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• 제11권5호
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• pp.347-352
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• 1998

In this paper, the extraction and optimization of SPICE parameters on SONOSFET for NVSM circuit design were discussed. SONOSFET devices with different channel widths and lengths were fabricated using conventional 1.2 um n-well CMOS process. And, electric properties for dc parameters and capacitance parameters were measured on wafer. SPICE parameters for the SONOSFET were extracted from the UC Berkeley level 3 model for the MOSFET. And, local optimization of Ids-Vgs curves has carried out in the bias region of subthreshold, linear, saturation respectively. Finally, the extracted SPICE parameters were optimized globally by comparing drain current (Ids), output conductance(gds), transconductance(gm) curves with theoretical curves in whole region of bias conditions. It is shown that the conventional model for the MOSFET can be applied to the SONOSFET modeling except sidewalk effect.

• 전기학회논문지
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• 제65권3호
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• pp.439-444
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• 2016

The method for extracting the SPICE model parameter of Schottky diode under DC forward bias is proposed. A method for improving the accuracy of the SPICE model parameter at various temperatures is proposed. Three analysis steps according to the magnitude of the current is used in order to extract the parameters effectively. At each analysis step, initial parameters are calculated by using the current-voltage equations and the Levenberg-Marquardt analysis is proceeded. To verify the validity of the proposed method, the SPICE model parameters for the BAT45 and FSV1045 under DC forward bias is extracted. Schottky diode currents obtained from the proposed method shows the average relative error of 6.1% and 9% compared with the measured data for the BAT45 and FSV1045 sample at various temperatures.

• 대한전기학회논문지
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• 제43권4호
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• pp.607-612
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• 1994

The static and dynamic model of IGBT for the SPICE simulation has been successfully developed. The various circuit model parameters are extracted from the I-V and C-V characteristics of IGBT and implemented into our model. The static model of IGBT consists of the MOSFET, bipolar transistor and series resistance. The parameters to be extracted are the threshold voltage of MOSFET, current gain $\beta$ of bipolar transistor, and the series resistance. They can be extracted from the measured I-V characteristics curve. The C-V characteristics between the terminals are very important parameters to determine the turn-on and turn-off waveform. Especially, voltage dependent capacitance are polynomially approximated to obtain the exact turn-on and turn-off waveforms. The SPICE simulation results employing new model agree well with the experimental values.

• 대한전기학회논문지
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• 제43권2호
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• pp.251-258
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• 1994

To apply the Power MOSFET to the high powerd circuits, the parallel operation of the Power MOSFET must be considered because of their low power rating. This means, in practical applications, design methods for the parallel operations are required. However, it is very difficult to investigate the problem of parallel operations by directly changing the internal parameters of the MOSFET. Thus, in this paper, the effects of internal parameters for the parallel operation are investigated using SPICE program which is often used and known that the program is very reliable. The investigation results show that while the gate resistance and gate capacitances are the parameters which affect to the dynamic switching operations, the drain and source resistances are the parameters which affect to the steady-state current unbalances. Through this investigation, the design methods for the parallel operation of the MOSFET are suggested, which, in turn, contributes to the practical use of Power MOSFETs.

• Journal of information and communication convergence engineering
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• 제14권2호
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• pp.115-121
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• 2016

Currently there is a lack of literature on SPICE-level models of double-gate (DG) tunnel field-effect transistors (TFETs). A DG TFET compact model is presented in this work that is used to develop a SPICE model for DG TFETs implemented with Verilog-A language. The compact modeling approach presented in this work integrates several issues in previously published compact models including ambiguity about the use of tunneling parameters A_k and B_k, and the use of a universal equation for calculating the surface potential of DG TFETs in all regimes of operation to deliver a general SPICE modeling procedure for DG TFETs. The SPICE model of DG TFET captures the drain current-gate voltage (I_ds-V_gs) characteristics of DG TFET reasonably well and offers a definite computational advantage over TCAD. The general SPICE modeling procedure presented here could be used to develop SPICE models for any combination of structural parameters of DG TFETs.

• 전기학회논문지
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• 제58권9호
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• pp.1769-1774
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• 2009

An algorithm for extracting the BJT DC model parameter values for SPICE model is proposed. The nonlinear optimization method for analyzing the device I-V data using the Levenberg-Marquardt algorithm is proposed and the method for calculating initial conditions of model parameters to improve the convergence characteristics is proposed. The base current and collector current obtained from the proposed method shows the root mean square error of 6.04% compared with the measured data of the PNP BJT named 2SA1980.

• 대한전자공학회논문지SD
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• 제37권10호
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• pp.11-16
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• 2000

회로설계 엔지니어들이 쉽게 RF IC 설계에 사용할 수 있는 나선형 인덕터의 SPICE 모델을 개발하였다. 이 모델은 나선형 인덕터의 등가회로 소자 값들을 SPICE의 user-defined function 및 subcircuit 기능을 이용하여, 레이아웃 변수, 공정 변수, 실리콘 기판 변수로부터 정의하였다. 특히 인덕턴스는 임의의 회전에 대한 인덕턴스 Li 및 임의의 두 회전에 대한 상호 인덕턴스 Mij를 subcircuit으로 정의하여 전체 인덕턴스 값을 계산하였다. 모델의 정확성을 검증하기 위하여 CMOS 0.8${\mu}m$ 공정으로 제작된 나선형 인덕터의 측정 s-파라미터, 총 인덕턴스 및 quality-factor 결과를 시뮬레이션 데이터와 비교한 결과 일치함을 확인하였다. 본 논문에서 제시된 SPICE를 이용한 나선형 인덕턴스 모델은 scalable하며, 실리콘 기판의 영향등을 포함하기 때문에 레이아웃 최적화에 쉽게 사용할 수 있는 장점을 가진다.

• 대한전자공학회논문지SD
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• 제46권12호
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• pp.24-29
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• 2009

$0.18{\mu}m$ deep n-well 벌크 NMOSFET에서 측정된 차단주파수 $f_T$의 고온종속성을 모델화하기 위해, 측정된 S-파라미터를 사용한 정확한 RF 방법으로 $30^{\circ}C$에서 $250^{\circ}C$까지 전자속도 고온 데이터가 추출되었다. 이러한 추출데이터를 사용하여 개선된 온도종속 전자속도 방정식이 높은 온도의 범위에서 생기는 기존 방정식의 모델링 오차를 없애기 위해 개발되었으며 BSIM3v3 SPICE RF 모델에 구현되었다. 개선된 온도 종속 방정식은 기존 모델보다 $30^{\circ}C$에서 $250^{\circ}C$까지 측정된 $f_T$와 더 잘 일치하였으며, 이는 개선된 방정식의 정확성을 입증한다.

• Journal of Power Electronics
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• 제19권6호
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• pp.1591-1600
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• 2019

In this paper, a practical SPICE model for an IGBT and a PiN diode is proposed based on the Finite Differential Method (FDM). Other than the conventional Fourier model and the Hefner model, the excess carrier distribution can be accurately solved by a fast FDM in the SPICE simulation tool. In order to improve the accuracy of the SPICE model, the Taguchi method is adopted to calibrate the extracted parameters. This paper presents a numerical modelling approach of an IGBT and a PIN diode, which are also verified by SPICE simulations and experiments.

• 전자공학회논문지D
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• 제36D권5호
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• pp.54-61
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• 1999

SPICE MOS 모델을 외부 다이오드를 추가하는 방식을 사용하여, 기판 분포저항을 고려한 MOS 트랜지스터의 매크로 모델 형태를 제안하였다. 본 매크로 모델을 사용하여 W=200㎛, L=0.8㎛의 NMOS 트랜지스터를 기준으로 시행한 s-파라미터의 시뮬레이션치를 s-파라미터 측정치에 fitting 하는 과정을 통해 RF 영역에 적용 가능한 모델 세트를 확보하고 RF 영역에서의 기판 저항의 분포 효과를 분석하였다. s-파라미터로부터 환산된 AC 저항 및 커패시턴스와 같은 물리적 파리미터의 시뮬레이션치를 측정치와 비교함으로써 시뮬레이션된 s-파라미터의 신빙성을 확인하였다. 10GHz 이하의 주파수 영역에 대해서는 접합 다이오드가 포함되어 있는 기존 SPICE의 MOS 모델을 그대로 사용하고 게이트 노드와 기판 노드에 적절한 lumped 저항 한 개씩을 추가하는 간단한 형태의 매크로 모델을 사용하는 것이 적절하다고 판단된다.