• Current Photovoltaic Research
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• v.10 no.3
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• pp.84-89
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• 2022

c-Si solar cells currently account for more than 90% of the solar energy market. Research on tandem junction solar cells to overcome efficiency limitations is drawing attention at a time when new technologies are being developed to secure the price competitiveness of silicon solar cells. Among several candidate materials for silicon-based tandem solar cells, perovskite has recently been studied as it is suitable for the ease of process as well as for its properties as a tandem solar cell material. In this study, we want to review the research trends and technology limitations of 2-T Perovskite/SHJ tandem junction solar cells.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.4
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• pp.439-444
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• 2024

This study investigates the post-thermal treatment effects on the efficiency of silicon heterojunction solar cells, specifically examining the influence of annealing on p-type microcrystalline silicon oxide and ITO thin films. By assessing changes in carrier concentration, mobility, resistivity, transmittance, and optical bandgap, we identified conditions that optimize these properties. Results reveal that appropriate annealing significantly enhances the fill factor and current density, leading to a notable improvement in overall solar cell efficiency. This research advances our understanding of thermal processing in silicon-based photovoltaics and provides valuable insights into the optimization of production techniques to maximize the performance of solar cells.

• Current Photovoltaic Research
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• v.7 no.3
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• pp.76-84
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• 2019

Silicon heterojunction solar cells (SHJ) have dominated the photovoltaic market up till now but their conversion performance is practically limited to around 26% compared with the theoretical efficiency limit of 29.4%. A silicon based multi-junction devices are expected to overcome this limitation. In this report, we briefly review the state-of-art characteristic of wide-gap materials which has played a role as top sub-cells in silicon based multi-junction solar cells. In addition, we indicate significantly practical challenges and key issues of these multi-junction combination. Finally, we focus to some characteristics of III-V/c-Si tandem configuration which are reaching highly record performance in multi-junction silicon solar cells.

• Current Photovoltaic Research
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• v.11 no.2
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• pp.39-43
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• 2023

Carrier-selective contacts (CSCs) solar cells are considerably attractive on highly efficient crystalline silicon heterojunction (SHJ) solar cells due to their advantages of high thermal tolerance and the simple fabrication process. CSCs solar cells require a hole selective contact (HSC) layer that selectively collects only holes. In order to selectively collect holes, it must have a work function characteristic of 5.0 eV or more when contacted with n-type Si. The VO_x, NiO_x, and CuI_x thin films were fabricated and analyzed respectively to confirm their potential usage as a hole-selective contact (HSC) layer. All thin films showed characteristics of band-gap engergy > 3.0 eV, work function > 5.0 eV and minority carrier lifetime > 1.5 ms.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.6
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• pp.603-609
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• 2022

Passivation quality is mainly governed by epitaxial growth of crystalline silicon wafer surface. Void-rich intrinsic a-Si:H interfacial layer could offer higher resistivity of the c-Si surface and hence a better device efficiency as well. To reduce the resistivity of the contact area, a modification of void-rich intrinsic layer of a-Si:H towards more ordered state with a higher density is adopted by adapting its thickness and reducing its series resistance significantly, but it slightly decreases passivation quality. Higher resistance is not dominated by asymmetric effects like different band offsets for electrons or holes. In this study, multilayer of intrinsic a-Si:H layers were used. The first one with a void-rich was a-Si:H(I₁) and the next one a-SiO_x:H(I₂) were used, where a-SiO_x:H(I₂) had relatively larger band gap of ~2.07 eV than that of a-Si:H (I₁). Using a-SiO_x:H as I₂ layer was expected to increase transparency, which could lead to an easy carrier transport. Also, higher implied voltage than the conventional structure was expected. This means that the a-SiO_x:H could be a promising material for a high-quality passivation of c-Si. In addition, the i-a-SiO_x:H microstructure can help the carrier transportation through tunneling and thermal emission.