• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.2
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• pp.117-126
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• 2012

This paper provides a method for compression transmission of on-chip bus data. As the data traffic on on-chip buses is rapidly increasing with enlarged video resolutions, many video processor chips suffer from a lack of bus bandwidth and their IP cores have to wait for a longer time to get a bus grant. In multimedia data such as images and video, the adjacent data signals very often have little or no difference between them. Taking advantage of this point, this paper develops a simple bus data compression method to improve the chip performance and presents its hardware implementation. The method is applied to a Video Codec - 1 (VC-1) decoder chip and reduces the processing time of one macro-block by 13.6% and 10.3% for SD and HD videos, respectively

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.3
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• pp.194-197
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• 2005

Digital display products are gradually becoming diversified and pursuing high-quality image display. Digital TV supports various video signal formats from conventional SD to digital HD because the format conversion of video image is required. Traditional format conversion of the video image is achieved by a 1-dimensional linear interpolator applying both horizontal and vertical direction. Jagging artifact can be expressed as the linkage of line segments in several directions. In this paper, we present the method that removes jagging artifact effectively using PCA (Principle Component Analysis) and reserve the detail in a given image.

• Journal of Broadcast Engineering
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• v.10 no.2
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• pp.131-138
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• 2005

High-quality digital broadcasting contents are susceptible to illegal copy and unauthorized redistribution, which makes broadcasters difficult to protect valuable media assets. So, broadcasters and content providers need the technology for copyright protection of professional digital content. Digital watermarking technology is one of the most actively developed solutions for the copyright protection. This paper suggests the requirements of watermarking technology in DTV(Digital TV) environment for copyright protection and shows the developed real-time watermark embedding/detecting system for HD(High Definition)/SD(Standard Definition) video and experimental results of the system against watermark attack tests. Our watermarking system meets the watermarking requirements of invisibility, robustness and security of DTV environment.

• Broadcasting and Media Magazine
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• v.4 no.4
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• pp.46-51
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• 1999

The introduction of broadcast digital television (DTV) was, at one time, seen as an opportunity to rationalise video formats. The reality is quite different with a rapid divergence as the united States' ATSC offers 18 formats to cover both standard definition (SD) and high definition (HD), and yet more are supported by Europe's DVB. At the same time multi-media is expanding both as an area for source material and for finished work. Post production needs to move away from single-format facilities as requirements for multi-format operation is already increasing. A 'format-independent' solution is described which allows efficient operation with any mix of input formats and able to output any format with high quality. Attention is given to retaining the speed, accuracy and immediacy which is a feature of today's professional facilities -even while handling the greater demands of HD. Another route, using 24 frames-per-second is also examined.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.10
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• pp.67-71
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• 2011

Existing face detection systems, which are used for digital door locks, digital cameras, video surveillance systems, and so on, are software-based implementation for relatively low level resolution images. Therefore, in this case, there are difficulties in detecting faces in a real-time fashion due to the increasing amount of operational processing as well as in allowing the requirements of face detections for HD(High Definition) resolutions. A hardware approach is necessary to efficiently find faces for HD images in real-time embedded systems. This paper proposes and implements a hardware architecture for an LBP(Local Binary Pattern) operation which is a time-consuming part as one of preprocessing steps for face detection. The hardware architecture proposed in this research has been implemented and tested with a FPGA(Field Programmable Gate Array) chip, and shown that the approach guarantees efficient face detection for HD images.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.48-54
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• 2010

This paper presents a high-performance architecture of integer-pel motion estimation circuit for H.264 video CODEC. Full search algorithm guarantees the best results by examining all candidate blocks. However, the full search algorithm requires a huge amount of computation and data. Many fast search algorithms have been proposed to reduce the computational efforts. The disadvantage of these algorithms is that data access from or to memory is very irregular and data reuse is difficult. In this paper, we propose an efficient integer-pixel motion estimation algorithm and the circuit architecture to improve the processing speed and reduce the external memory bandwidth. The proposed circuit supports seven kinds of variable block sizes and generates 41 motion vectors. We described the proposed high-performance motion estimation circuit at R1L and verified its operation on FPGA board. The circuit synthesized by using l30nm CMOS standard cell library processes 139.8 1080HD ($1,920{\times}1,088$) image frames per second and supports up to H.264 level 5.1.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.12
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• pp.58-65
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• 2011

This paper presents an ASIP (Application-specific Instruction Processor) for motion estimation that employs specific IME instructions and its programmable and reconfigurable hardware architecture for various video codecs, such as H.264/AVC, MPEG4, etc. With the proposed specific instructions and variable point 2D SAD hardware accelerator, it can handle the real-time processing requirement of High Definition (HD) video. With the SAD unit and its parallel operations using pattern information, the proposed IME instructions support not only full search algorithms but also other fast search algorithms. The hardware size is 25.5K gates for each Processing Element Group (PEG) which has 128 SAD Processor Elements (PEs). The proposed ASIP has been verified by the Synopsys Processor Designer and implemented by the Design Compiler using the IBM 90nm process technology. The hardware size is 453K gates for the IME unit and the operating frequency is 188MHz for 1080p@30 frame in real time. The proposed ASIP can reduce the hardware size about 26% and the number of operation cycles about 18%.

• The Journal of the Korea Contents Association
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• v.12 no.6
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• pp.78-91
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• 2012

The Terrestrial DTV service compliant with ATSC has been advancing for years. In KBA(Korean Broadcasters Association), a multi-channel service was broadcasted on air during the period of the 2006 FIFA World Cup Germany with the various type of MMS(Multi Mode Service) using MPEG-2 encoding method. MMS Service can provides not only one HD channel but also serveral additional services within 6MHz bandwidth. Using digital video compression technology(MPEG-2), many various programs such as HDTV, SDTV, Audio and Data are able to be transmitted within the same bandwidth. From November 2009, KBS has been preparing an advanced MMS service, 'Korea-View' which has both methods of encoding, MPEG-2 and H.264 that is compliant ATSC mobile standard, A/153. Korea-View is a kind of multi-channel broadcast service to provide one HD and 3 SD programs with the bandwidth of 6MHz. Terrestrial multi-channel service is required to focuse on expanding viewer service. Such Terrestrial multi-channel services will contribute to transferring to digital broadcasting and to extending the viewers' welfare. Due to advances in digital technology, Pay-TV channels has increased to hundreds. Even though digital switchover is being proceeded, terrestrial broadcasters have been unable to deliver multi-channel services. In this paper, technical features and differences of MMS and Koreaview will be analyzed regarding terrestrial multi-channel broadcasting services, and the politic direction will be proposed in accordance with introduction of future service.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.11
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• pp.71-76
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• 2008

H.264(or MPEG-4/AVC pt.10) is a high performance video coding standard, and is widely used. Variable length code (VLC) of the H.264 standard compresses data using the statistical distribution of values. A decoder parses the compressed bit stream and searches decoded values in lookup tables, and the decoding process is not easy to implement by hardware. We propose an architecture of variable length decoder(VLD) for the H.264 baseline profile(BP) L4. The CAVLD decodes syntax elements using the combination of arithmetic units and lookup tables for the optimized hardware architecture. A barral shifter and a first 1's detector parse NAL bit stream, and are shared by Exp-Golomb decoder and CAVLD. A FIFO memory between CAVLD and the reorder unit and a buffer at the output of the reorder unit eliminate the bottleneck of data stream. The proposed VLD is designed using Verilog-HDL and is implemented using an FPGA. The synthesis result using a 0.18um standard CMOS technology shows that the gate count is 22,604 and the decoder can process HD($1920{\times}1080$) video at 120MHz.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2004.11a
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• pp.285-288
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• 2004

High-quality digital broadcasting contents are susceptible to illegal copy and unauthorized redistribution, which makes broadcasters difficult to protect valuable media assets. So, broadcasters and content providers need the technology for copyright protection of professional digital content. Digital watermarking technology is one of the most actively developed solutions for the copyright protection. This paper suggests the requirements of watermarking technology in DTV(Digital TV) environment for copyright protection and shows the developed real-time watermark embedding/detecting system for HD(High Definition)/SD(Standard Definition) video and experimental results of the system against watermark attack tests. Our watermarking system meets the watermarking requirements of invisibility, robustness and security of DTV environment.