• Title/Summary/Keyword: SAS(semiconductor-atomic superattice)

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Characteristics of Semiconductor-Atomic Superlattice for SOI Applications (SOI 응용을 위한 반도체-원자 초격자 구조의 특성)

  • Seo, Yong-Jin;Park, Sung-Woo;Lee, Kyoung-Jin;Kim, Gi-Uk;Park, Chang-Jun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.11a
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    • pp.180-183
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    • 2003
  • The monolayer of oxygen atoms sandwitched between the adjacent nanocrystalline silicon layers was formed by ultra high vacuum-chemical vapor deposition (UHV-CVD). This multi-layer Si-O structure forms a new type of superlattice, semiconductor-atomic superattice (SAS). According to the experimental results, high-resolution cross-sectional transmission electron microscopy (HRTEM) shows epitaxial system. Also, the current-voltage (I-V) measurement results show the stable and good insulating behavior with high breakdown voltage. It is apparent that the system may form an epitaxially grown insulating layer as possible replacement of silicon-on-insulator (SOI), a scheme investigated as future generation of high efficient and high density CMOS on SOI.

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Characteristics of Semiconductor-Atomic Superlattice for SOI Applications (SOI 응용을 위한 반도체-원자 초격자 구조의 특성)

  • 서용진
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.53 no.6
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    • pp.312-315
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    • 2004
  • The monolayer of oxygen atoms sandwiched between the adjacent nanocrystalline silicon layers was formed by ultra high vacuum-chemical vapor deposition (UHV-CVD). This multilayer Si-O structure forms a new type of superlattice, semiconductor-atomic superlattice (SAS). According to the experimental results, high-resolution cross-sectional transmission electron microscopy (HRTEM) shows epitaxial system. Also, the current-voltage (Ⅰ-Ⅴ) measurement results show the stable and good insulating behavior with high breakdown voltage. It is apparent that the system may form an epitaxially grown insulating layer as possible replacement of silicon-on-insulator (SOI), a scheme investigated as future generation of high efficient and high density CMOS on SOI.