• Title/Summary/Keyword: Rising Edge Signal

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An Algorithm for BPSK Demodulation by Microprocessor (마이크로프로세서에 의한 BPSK 복조 알고리즘)

  • 배용근;이영석;김기정;박인규;오상기;진달복
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.8
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    • pp.1518-1527
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    • 1994
  • An algorithm for BPSK demodulation of which channel is an electric distribution line is developed, and realized in this paper. To realize the BPSK demodulation by microprocessor, BPSK signal that is received through the distribution line must be converted to digital signal. A hardware which converts BPSK signal to digital one has been designed in this paper, and an algorithm for BPSK demoduation of which channel is distribution line has been also developed in algorithm for BPSK demoduation of which channel is distribution line has been also developed in this paper by paying the attention to the fact that a modulated point appears up and down according to the rising edge and falling edge of the modulated binary signal if the carrier frequency is even times to the modulated binary signal, and by paying the attention to the fact that the signal duration or modulated point is twice of the other point. The microprocessor demodulation system with the algorithm has been realized. The system proved to have 0.02%(or less) bit error rate in real BPSK demodulation.

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A Study on the Development of an Electronic Control Unit for a Gasoline Engine using Microcomputer (마이크로컴퓨터를 이용한 가솔린 기관용 전자제어장치의 개발에 관한 연구)

  • Kim, T.H.;Cho, J.H.
    • Transactions of the Korean Society of Automotive Engineers
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    • v.3 no.6
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    • pp.224-237
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    • 1995
  • An ECU(Electronic Control Unit) with 16 bit microcomputer has been developed. This system includes hardware and software for more precise control on fuel injection, ignition timing, and idle speed. This control system employs an air flow sensor of the hot wire type, a direct ignition system, an idle speed control system using a solenoid valve, and a crank angle sensor. Especially, the crank angle sensor provides two separate signals: One is the position signal(POS) which indicates 180 degree pulses per revolution, and the other is the reference signla(REF) that represents each cylinder individually. The conventional engine control system requires at least two engine revolutions in order to identify the cylinder number. However, the developed engine control system can recognize the cylinder number within a quarter of an engine revolution. Therfore, the developed engine control system has been able to control fuel injection and ignition timing more quickly and accurately, Furthermore, the number of misfire reduces during the cold start.

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Mesochronous Clock Based Synchronizer Design for NoC (위상차 클럭 기반 NoC 용 동기회로 설계)

  • Kim, Kang-Chul;Chong, Jiang
    • The Journal of the Korea institute of electronic communication sciences
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    • v.10 no.10
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    • pp.1123-1130
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    • 2015
  • Network on a chip(NoC) is a communication subsystem between intellectual property(IP) cores in a SoC and improves high performance in the scalability and the power efficiency compared with conventional buses and crossbar switches. NoC needs a synchronizer to overcome the metastability problem between data links. This paper presents a new mesochronous synchronizer(MS) which is composed of selection window generator, selection signal generator, and data buffer. A delay line circuit is used to build selection window in selection window generator based on the delayed clock cycle of transmitted clock and the transmitted clock is compared with local clock to generate a selection signal in the SW(selection window). This MS gets rid of the restriction of metastability by choosing a rising edge or a falling edge of local clock according to the value of selection signal. The simulation results show that the proposed MS operates correctly for all phase differences between a transmitted clock and a local clock.

High Frequency Noise Reduction in ECG using a Time-Varying Variable Cutoff Frequency Lowpass Filter (시변 가변차단주파수 저역통과필터를 이용한 심전도 고주파 잡음의 제거)

  • 최안식;우응제;박승훈;윤영로
    • Journal of Biomedical Engineering Research
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    • v.25 no.2
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    • pp.137-144
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    • 2004
  • ECG signals are often contaminated with high-frequency noise such as muscle artifact, power line interference, and others. In the ECG signal processing, especially during a pre-processing stage, numerous noise removal techniques have been used to reduce these high-frequency noise without much distorting the original signal. This paper proposes a new type of digital filter with a continuously variable cutoff frequency to improve the signal quality This filter consists of a cutoff frequency controller (CFC) and variable cutoff frequency lowpass filter (VCF-LPF). From the noisy input ECG signal, CFC produces a cutoff frequency control signal using the signal slew rate. We implemented VCF-LPF based on two new filter design methods called convex combination filter (CCF) and weight interpolation fille. (WIF). These two methods allow us to change the cutoff frequency of a lowpass filter In an arbitrary fine step. VCF-LPF shows an excellent noise reduction capability for the entire time segment of ECG excluding the rising and falling edge of a very sharp QRS complex. We found VCF-LPF very useful and practical for better signal visualization and probably for better ECG interpretation. We expect this new digital filter will find its applications especially in a home health management system where the measured ECG signals are easily contaminated with high-frequency noises .