• 제목/요약/키워드: Ripple cancellation

검색결과 28건 처리시간 0.021초

Control Strategy of Total Output Power Ripple Cancellation for DFIG in MV Wind Power Systems under Unbalanced Grid Conditions

  • Han, Daesu;Suh, Yongsug
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2015년도 전력전자학술대회 논문집
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    • pp.355-356
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    • 2015
  • This paper proposes a control strategy of total output power ripple cancellation for both of Machine-Side Converter (MSC) and Grid-Side Converter (GSC) in a DFIG under unbalanced grid conditions. The proposed control strategy for the MSC is the zero torque ripple control algorithm with an enhanced LVRT capability. The control algorithm for the MSC exhibits reduced torque pulsation in steady-state unbalanced grid conditions. In addition, this control algorithm also minimizes a peak value of rotor current in transient unbalanced grid conditions. The total output power ripple cancellation control algorithm is adopted in the GSC. The total output power ripple cancellation is achieved by nullifying the oscillating component of the total output active and reactive power at the summing point of stator and rotor of DFIG. The proposed control strategy for the GSC reduces the output power oscillation leading to the improved quality of wind farms output.

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역률 개선 컨버터용 고차 능동 필터의 설계 및 분석 (Design and Analysis of High-order Active Input Filter for Power Factor Correction(PFC) Converter)

  • 이동영;조보형
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1996년도 하계학술대회 논문집 A
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    • pp.259-261
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    • 1996
  • In this paper, active input filter for power factor correction(PFC) circuit employing ripple arrent and voltage cancellation is proposed to reduce filter's size and cost, and to make filter design easy. Switching ripple current and voltage can be sensed through the secondary windings of filter inductor. Single stage passive filter can achieve high order filter characteristics by using active ripple current and voltage cancellation technique. Conventional high order passive filter and its problems are suggested. Analysis of active filter and design procedure are detailed. Simulation result is presented to verify high order filter characteristics of proposed scheme.

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저전압 대전류 SPMSM 토크리플 저감 제어 (A Study on the Torque Ripple Reduction of Low Voltage High Current SPMSM)

  • 이근호;홍정표
    • 전기학회논문지
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    • 제58권12호
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    • pp.2391-2395
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    • 2009
  • Active control schemes which modify the excitation to correct for any of the nonideal characteristics of the SPMSM is described. Especially, because of design limitations(size and cost) in automobile, the back-EMF of SPMSM can't be perfectly designed with sinusoidal wave and iron core of stator is saturated so that torque ripple is unavoidable. An active cancellation method of the pulsating torque components which would otherwise be generated using the classic sinusoidal current excitation is illustrated.

리플저감을 위한 Chebyshev 필터 조합에 관한 연구 (A Study on the Cascading Chebyshev Filter for Ripple Cancellation)

  • 강두병;신승식
    • 전기학회논문지
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    • 제61권1호
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    • pp.168-172
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    • 2012
  • This paper is focusing on the comparison of different kinds of BPFs(Band Pass Filters) passing signals with a particular frequency band. According to the different classifications, features and target application systems, BPF has many types. Chebyshev filter which has a steep slope and a few ripples, and Butterworth filter which has no ripple but gentle slope are the most typical BPFs. The ideal filter is flat in the passband and the slope in the transition band is perpendicular. In this paper, we suggest the cascading Chebyshev BPF with the advantages of the Chebyshev filter and the Butterworth filter simultaneously to make a closest filter to an ideal filter. The proposing BPF is the tenth Chebyshev BPF cascading the fourth and the sixth, and it is designed as the tenth cascading Chebyshev BPF. To measure the performance of the designing filter, we have compared and analyzed the tenth Chebyshev filter with the tenth Butterworth filter. As a result, the tenth cascading Chebyshev BPF has decreased the ripple more than 1/4 [dB] in the passband. Finally, the output of the simulation showed the validity of the proposing cascading Chebyshev filter.

Active Cancellation of PMSM Torque Ripple Caused by Magnetic Saturation for EPS Applications

  • Lee, Geun-Ho
    • Journal of Power Electronics
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    • 제10권2호
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    • pp.176-180
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    • 2010
  • This paper deals with a control method to reduce the torque ripple of a permanent magnet synchronous motor (PMSM) for electric power steering (EPS) systems. Such an application requires a very low torque ripple in order to maintain a good steering feel. However, because of spatial limitations, it cannot help having a partial saturation in the iron core of the PMSM for an EPS system, and this saturation results in a significant torque ripple. Thus, this paper analyzes the torque ripple caused by the magnetic saturation of a PMSM and proposes a method with respect to inductance measurement to verify the partial saturation. In addition, it is shown that a compensation current is needed in order to minimize the torque ripple when a PMSM is driven in the high torque region. The estimation process of the current and the torque ripple decreased by the current are presented and verified with test results.

DCM Frequency Control Algorithm for Multi-Phase DC-DC Boost Converters for Input Current Ripple Reduction

  • Joo, Dong-Myoung;Kim, Dong-Hee;Lee, Byoung-Kuk
    • Journal of Electrical Engineering and Technology
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    • 제10권6호
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    • pp.2307-2314
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    • 2015
  • In this paper, a discontinuous conduction mode (DCM) frequency control algorithm is proposed to reduce the input current ripple of a multi-phase interleaved boost converter. Unlike conventional variable duty and constant frequency control, the proposed algorithm controls the switching frequency to regulate the output voltage. By fixing the duty ratio at 1/N in the N-phase interleaved boost converter, the input current ripple can be minimized by ripple cancellation. Furthermore, the negative effects of the diode reverse recovery current are eliminated because of the DCM characteristic. A frequency controller is designed to employ the proposed algorithm considering the magnetic permeability change. The proposed algorithm is analyzed in the frequency domain and verified by a 600 W three-phase boost converter prototype that achieved 57% ripple current reduction.

Cascading Chebyshev filter를 이용한 리플 제거에 관한 연구 (A Study on the ripple cancellation using two cascading Chebyshev filters)

  • 신승식
    • 전기학회논문지
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    • 제61권11호
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    • pp.1700-1705
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    • 2012
  • This study is focusing on ripple elimination in the band pass filter. There are generally two design methods in IIR filter design, which are a direct method and an indirect one. The indirect design method that designs the digital IIR LPF using the prototype analog LPF is applied to this study. A Butterworth filter and a Chebyshev filter are the typical prototype analog LPFs. This study shows characteristics of the digital IIR LPFs that are transformed from the prototype analog LPFs. The designed Butterworth and Chebyshev IIR LPFs are also designed as the band pass filters by frequency transformation in order to compare with the proposed cascading Chebyshev BPFs. This study shows frequency characteristics between the transformed IIR BPFs and the proposed cascading Chebyshev BPFs as well. The proposed cascading Chebyshev BPF is designed by cascading the different orders of Chebyshev BPFs. The aspect of the cascading filter is offsetting the ripples to descend them while the pass band ripples of the Chebyshev filter are ascending and vice versa. The designed cascading Chebyshev filter shows the flatness and the sharpness, which represent the advantages of Butterworth filter in the pass band and of Chebyshev filter in the transition band respectively. This result verifies the validity of the designed filter.

Effects of Input Harmonics, DC Offset and Step Changes of the Fundamental Component on Single-Phase EPLL and Elimination

  • Luo, Linsong;Tian, Huixin;Wu, Fengjiang
    • Journal of Power Electronics
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    • 제15권4호
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    • pp.1085-1092
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    • 2015
  • In this paper, the expressions of the estimated information of a single-phase enhanced phase-locked loop (EPLL), when input signal contains harmonics and a DC offset while the fundamental component takes step changes, are derived. The theoretical analysis results indicate that in the estimated information, the nth-order harmonics cause n+1th-order periodic ripples, and the DC offset causes a periodic ripple at the fundamental frequency. Step changes of the amplitude, phase angle and frequency of the fundamental component cause a transient periodic ripple at twice the frequency. These periodic ripples deteriorate the performance of the EPLL. A hybrid filter based EPLL (HF-EPLL) is proposed to eliminate these periodic ripples. A delay signal cancellation filter is set at the input of the EPLL to cancel the DC offset and even-order harmonics. A sliding Goertzel transform-based filter is introduced into the amplitude estimation loop and frequency estimation loop to eliminate the periodic ripples caused by the residual input odd-order harmonics and step change of the input fundamental component. The parameter design rules of the two filters are discussed in detail. Experimental waveforms of both the conventional EPLL and the proposed HF-EPLL are given and compared with each other to verify the theoretical analysis and advantages of the proposed HF-EPLL.

Interleaved DC-DC Converters with Partial Ripple Current Cancellation

  • Lin, Bor-Ren;Chiang, Huann-Keng;Cheng, Chih-Yuan
    • Journal of Power Electronics
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    • 제12권2호
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    • pp.249-257
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    • 2012
  • An interleaved PWM converter is proposed to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two ZVS converters with a common clamp capacitor. With the shared capacitor, the charge balance of the two interleaved parts is automatically regulated under input voltage and load variations. The active-clamping circuit is used to realize the ZVS turn-on so that the switching losses on the power switches are reduced. The ZVS turn-on of all of the switching devices is achieved during the transition interval. The interleaved pulse-width modulation (PWM) operation will reduce the ripple current and the size of the input and output capacitors. The current double rectifier (CDR) is adopted in the secondary side to reduce output ripple current so that the sizes of the output chokes and capacitor are reduced. The circuit configuration, operation principles and design considerations are presented. Finally experimental results based on a 408W (24V/17A) prototype are provided to verify the effectiveness of the proposed converter.

Performance Improvement of Voltage-mode Controlled Interleaved Buck Converters

  • Veerachary Mummadi
    • Journal of Power Electronics
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    • 제5권2호
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    • pp.104-108
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    • 2005
  • This paper presents the performance improvement of voltage-mode controlled interleaved synchronous buck converters. This is a voltage-mode controlled scheme, where the controllers do not need an external saw-tooth generator for PWM generation and the loop design is easier. The controller implementation requires only a single error amplifier and gives almost current mode control performance. The control scheme uses voltage feedback with two loops similar to current mode control: one for the slow outer loop and the other for the faster inner PWM control loop. To improve the performance of the converter system a coupled inductor is used. This coupled inductor reduces the magnetic size and also improves the converter's transient performance without increasing the steady-state current ripple. The effectiveness of the proposed control scheme is demonstrated through PSIM simulations.