• Title/Summary/Keyword: Ripple Compensation

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Design and Analysis of a 12 V PWM Boost DC-DC Converter for Smart Device Applications (스마트기기를 위한 12 V 승압형 PWM DC-DC 변환기 설계 및 특성해석)

  • Na, Jae-Hun;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.6
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    • pp.239-245
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    • 2016
  • In this study, a 12 V PWM boost converter was designed with the optimal values of the external components of the power stage was well as the compensation stage for smart electronic applications powered by a battery device. The 12 V boost PWM converter consisted of several passive elements, such as a resistor, inductor and capacitor with a diode, power MOS switch and control IC chip for the control PWM signal. The devices of the power stage and compensation stage were designed to maintain stable operation under a range of load conditions as well as achieving the highest power efficiency. The results of this study were first verified by a simulation in SPICE from calculations of the values of major external elements comprising the converter. The design was also implemented on the prototype PCBboard using commercial IC LM3481 from Texas Instruments, which has a nominal output voltage of 12 V. The output voltage, ripple voltage, and load regulation with the line regulation were measured using a digital oscilloscope, DMM tester, and DC power supply. By configuring the converter under the same conditions as in the circuit simulation, the experimental results matched the simulation results.

Mode Control Design of Dual Buck Converter Using Variable Frequency to Voltage Converter (주파수 전압 변환을 이용한 듀얼 모드 벅 변환기 모드 제어 설계)

  • Lee, Tae-Heon;Kim, Jong-Gu;So, Jin-Woo;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.42 no.4
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    • pp.864-870
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    • 2017
  • This paper describes a Dual Buck Converter with mode control using variable Frequency to Voltage for portable devices requiring wide load current. The inherent problems of PLL compensation and efficiency degradation in light load current that the conventional hysteretic buck converter has faced have been resolved by using the proposed Dual buck converter which include improved PFM Mode not to require compensation. The proposed mode controller can also improve the difficulty of detecting the load change of the mode controller, which is the main circuit of the conventional dual mode buck converter, and the slow mode switching speed. the proposed mode controller has mode switching time of at least 1.5us. The proposed DC-DC buck converter was implemented by using $0.18{\mu}m$ CMOS process and die size was $1.38mm{\times}1.37mm$. The post simulation results with inductor and capacitor including parasitic elements showed that the proposed circuit received the input of 2.7~3.3V and generated output of 1.2V with the output ripple voltage had the PFM mode of 65mV and 16mV at the fixed switching frequency of 2MHz in hysteretic mode under load currents of 1~500mA. The maximum efficiency of the proposed dual-mode buck converter is 95% at 80mA and is more than 85% efficient under load currents of 1~500mA.

Study of RF Impairments in Wideband Chirp Signal Generator (광대역 첩 신호 발생기를 위한 RF 불균형 연구)

  • Ryu, Sang-Burm;Kim, Joong-Pyo;Yang, Jeong-Hwan;Won, Young-Jin;Lee, Sang-Kon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.12
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    • pp.1205-1214
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    • 2013
  • Recently spaceborne SAR systems are increasing image resolution and frequency. As a high quality image resolution, the wider bandwidth is required and a wideband signal generator with RF component is very complicated and RF impairments of device is increased. Therefore, it is very important to improve performance by reducing these errors. In this study, the transmission signal of the wideband signal generator is applied to the phase noise, IQ imbalance, ripple gain, nonlinear model of high power amplifier. And we define possible structures of wideband signal generator and measure the PSLR and ISLR for the performance assesment. Also, we extract error of the amplitude and phase from the waveform and use a quadratic polynomial curve fitting and examine the performance change due to nonlinear device. Finally, we apply a high power amplifier predistortion method for non-linear error compensation. And we confirm that distortion in the output of the amplifier by intermodulation component is decreased by 15 dB.

Improved instantaneous Following Control Function for High Power Factor PWM Matrix Converter (고역율 PWM 매트릭스 컨버터의 개선된 순시추종 제어함수)

  • Kim, Kwang-Tae
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.3
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    • pp.35-43
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    • 2005
  • Matrix converters have been studied for eliminating dc link of conventional converter-inverter system, and various undulation strategy have been proposed. Therefore, matrix converter have no energy storage component except for small ac later for the elimination of switching ripple, and can be made compact and highly reliable compare with the do link inverter system. Matrix converter, however, directly connected the input and the output terminals by bidirectional static switch. As a result if the input voltage are asymmetrical, and contain harmonics, the influence of the distortions directly appear on the output terminal. This problem is a major obstacle to the matrix converter. A new control method using average comparison strategy have been proposed in this paper. This control method realizes sinusoidal input and output current unity input displacement factor regardless of load power factor. Moreover, compensation of the asymmetrical and/or harmonic containing input voltage is automatically realized, and calculation time of control function is reduced.

The Pitch/Turning Control Driver Design Modeling of Permanent Magnet Synchronous Motor (영구자석형 동기전동기의 고저/선회 제어용 드라이버 설계 모델링)

  • Lee, Chun-Gi;Hwang, Jeong-Won;Lee, Joung-Tae;Yang, Bin;Lim, Dong-Keun;Park, Seung-Yub
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.63 no.4
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    • pp.219-225
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    • 2014
  • The purpose of this paper is to control of the low-speed, high-precision PMSM 2-axes pitch/turning. In this paper, apply the PAM-PWM inverter for it. However, The PAM-PWM inverter, control algorithms and hardware is complex. But it is possible to improve the performance in the low-speed operation can reduce the effect of the PWM ripple and Dead Time of inverter by applying suitable DC-bus voltage control. The direct driver PMSM(Permanent Magnet Synchronous Motor) configured to vector control part, PAM control part and the other controller. The vector control part includes PI current, speed control, additional space vector modulation. PAM control part has to have PI voltage controller and P current controller for DC-bus voltage control. Besides, the motor position estimator, the speed estimator and the counter electromotive force and Dead Time Compensation are added. With this arrangement, PMSM was driven with a low pole pitch/turning by performing the current control to the current command or torque command is the paper. As a result, it was possible to minimize the disturbance component that appears in the drive in proportion to the DC voltage magnitude. The use of a hydraulic drive method for a two-axis bubble column is a typical tank. When using the PWM PAM inverter driver is in the turret can be driven by high-precision, low vibration, low noise compared to the hydraulic drive may contribute to the computerization of the turret.

One-Chip Multi-Output SMPS using a Shared Digital Controller and Pseudo Relaxation Oscillating Technique (디지털 컨트롤러 공유 및 Pseudo Relaxation Oscillating 기법을 이용한 원-칩 다중출력 SMPS)

  • Park, Young-Kyun;Lim, Ji-Hoon;Wee, Jae-Kyung;Lee, Yong-Keun;Song, Inchae
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.1
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    • pp.148-156
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    • 2013
  • This paper suggests a multi-level and multi-output SMPS based on a shared digital logic controller through independently operating in each dedicated time periods. Although the shared architecture can be devised with small area and high efficiency, it has critical drawbacks that real-time control of each DPWM generators are impossible and its output voltage can be unstable. To solve these problems, a real-time current compensation scheme is proposed as a solution. A current consumption of the core block and entire block with four driver buffers was simulated about 4.9mA and 30mA at 10MHz switching frequency and 100MHz core operating frequency. Output voltage ripple was 11 mV at 3.3V output voltage. Over/undershoot voltage was 10mV/19.6mV at 3.3V output voltage. The noise performance was simulated at 800mA and 100KHz load regulation. Core circuit can be implemented small size in $700{\mu}m{\times}800{\mu}m$ area. For the verification of proposed circuit, the simulations were carried out with Dong-bu Hitek BCD $0.35{\mu}m$ technology.