• The Transactions of the Korean Institute of Power Electronics
• /
• v.17 no.3
• /
• pp.213-221
• /
• 2012

In a PWM inverter-fed IPMSM (Interior Permanent Magnet Synchronous Motor) drive, a dead time is inserted to prevent a breakdown of switching device caused by the short-circuit of DC link. This distorts the inverter output voltage resulting in a current distortion and torque ripple. In addition to the dead time, nonlinearity exists in switching devices of the PWM inverter, which is generally dependent on operating conditions such as the temperature, DC link voltage, and current. The voltage disturbance caused by the dead time and inverter nonlinearity directly influences on the inverter output performance, and it is known to be more severe at low speed. In this paper, a new compensation scheme for the dead time and inverter nonlinearity under the parameter variation is proposed for a PWM inverter-fed IPMSM drive. The overall system is implemented using DSP TMS320F28335 and the validity of the proposed algorithm is verified through the simulation and experiments.

• Journal of IKEEE
• /
• v.23 no.2
• /
• pp.722-726
• /
• 2019

In this paper, we propose a low drop-out (LDO) regulator with improved power-supply rejection (PSR) characteristics in the high frequency region. In particular, an NMOS transistor with a high output resistance is added as a compensation circuit to offset the high frequency noise passing through the finite output resistance of the PMOS power switch. The elimination of power supply noise by the compensating transistor was explained analytically and presented as the direction for further improvement. The circuit was fabricated in a $0.35-{\mu}m$ standard CMOS process and Specter simulations were carried out to confirm the PSR improvement of 26 dB compared to the conventional LDO regulator at 10 MHz.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.11 no.5
• /
• pp.395-403
• /
• 2006

This paper has proposed a new dead time compensation method for a voltage-fed PMW inverter. In the voltage-fed PMW inverter, a voltage distortion is generated by the dead time effect and the nonlinear characteristics of the switching devices. Especially, the distorted voltage causes 5th and 7th harmonics in the stationary phase currents, and 6th harmonic in the synchronous phase currents. As a result, the integrator output of the synchronous PI current regulator has the ripple corresponding to six times of the inverter output frequency. In this paper, the signal of the integrator output of the d-axis current regulator is used as the control signal for the dead time compensation. The experimental and simulation results are presented to verify the validity of the proposed method.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.9
• /
• pp.1-7
• /
• 2008

This paper proposes 3.3V input and 1.8V output voltage mode step-down DC-DC buck converter for wireless mobile system which is designed in a standard 0.35$\mu$m CMOS process. The proposed capacitor multiplier method can minimize error amplifier compensation block size by 30%. It allows the compensation block of DC-DC converter be easily integrated on a chip. Also, we improve efficiency to 3% using low power buffer. Measurement result shows that the circuit has less than 1.17% output ripple voltage and maximum 83.9% power efficiency.

• Proceedings of the KIEE Conference
• /
• 2002.07b
• /
• pp.1081-1083
• /
• 2002

Voltage sag is discussed a important problem of power quality in transmission sys-tem. So recently The study on the compensatio-n for voltage sag is made good progress, Especially a compensation in unbalance sources system is difficult. In this paper, we proposed a series voltage compensator and a rejection of voltage ripple from synchronous frame in unbal-anced sources

• Proceedings of the KIPE Conference
• /
• 2016.07a
• /
• pp.237-238
• /
• 2016

단상 계통연계 인버터는 직류측에 계통주파수의 2배로 낮은 주파수의 전류리플을 발생시킨다. 이 저주파리플은 태양광, 풍력, 연료전지 같은 신재생에너지원의 수명 및 안정성을 저하시킨다. 본 논문에서는 이러한 저주파리플을 신재생에너지원으로 전달되지 못하게 차단하는 제어 알고리즘을 제안한다. 제안하는 알고리즘은 주 제어기(전압제어)의 성능 및 안정도에 영향을 주지 않으며 계통주파수 변동에 강인한 특징을 갖는다. 또한 별도의 파라미터 설계가 없어 구현이 용이하다. 본 논문에서는 3kW급 시작품의 실험결과를 통해 제안하는 알고리즘의 타당성을 검증하였다.

• The Transactions of the Korean Institute of Electrical Engineers B
• /
• v.52 no.12
• /
• pp.649-654
• /
• 2003

The simplest method for measuring output currents of the three phase inverters is to measure them with three current sensors such as hall sensors. This method requires at least two current sensors, and these types of sensors are somewhat expensive. More economical method is measuring DC link current with a simple shunt resistor, then, reconstructing output current using the DC link current value and the switching status. However, in low speed region, the measurement becomes difficult and even impossible due to the requirement of minimum switching duration for A/D conversion. These problems can be overcome by limitation of switching duration. Limitation of switching, however, causes voltage and current distortion. Owing to compensation, distortion can be effectively suppressed. However these increase acoustic noise due to increment of current ripple. In this paper, a current measurement method is proposed, which can reduce minimum switching duration resulting in reduction of acoustic noise. The validity of proposed method is confirmed through experiment.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
• /
• v.3B no.1
• /
• pp.59-64
• /
• 2003

This paper presents a new rotor position estimation method for brushless DC motors. The estimation error of the rotor position clearly provokes the phase shift angle misaligned between the phase current and the back-EMF waveforms, which causes torque ripple in brushless DC motor drives. Such an estimation error can be reduced with the help of the proposed neutral-voltage-based estimation method, which is structured as a closed loop observer. A neutral voltage appearing during the normal mode of the inverter operation is found to be an observable and control table measure, which can be used for estimating an exact rotor position. This neutral voltage is obtained from the DC-link current, the switching logic, and the motor speed values. The proposed algorithm, which can be easily implemented by using a single DC-link current and the motor terminal voltage sensors, is verified by simulation and experiment results.

• Proceedings of the KIEE Conference
• /
• 2004.07e
• /
• pp.114-115
• /
• 2004

인버터는 주로 커패시터 입력형 정류기를 사용하고 있다. 이로인해 인버터는 역률이 나쁘고 고조파가 발생하며 화학적, 열적 특성의 열화로 인버터 고장율을 증가시킨다. 따라서 평활용 커패시터를 제거하면 불완전한 특성을 갖는 커패시터로 인한 문제점을 해결할 수 있다. 그러나 다시 이로 인하여 발생되는 리플전압으로 인한 문제가 박생하게 된다. 본 연구에서는 이러한 리플을 순시추종 보상형 PWM 제어기를 사용하여 해결하므로 우수한 특성을 갖는 인버터 시스템을 설계할 수 있었다.

• Proceedings of the KSR Conference
• /
• 2010.06a
• /
• pp.1271-1278
• /
• 2010

High-speed traction has voltage source variation because the electric power of tractions is supplied by difference traction power system according to operating section. This paper proposes the robust control maintaining constant output performance against voltage source variation for PWM converters of the high speed traction. The proposed scheme consists of feed-forward compensation for current controller by on-line calculating the rms voltage of voltage source. Total dynamic performance of high speed traction can be improved by the reduction of the output voltage ripple which is resulted from voltage source sag and variation. The superior performance and validity of the proposed scheme is proved through the simulation.