• Title/Summary/Keyword: Reverse Saturation Current

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Electron Tunneling Characteristics of PtSi-nSi Junctions according to Temperature Variations (온도변화에 따른 백금 실리사이드-엔 실리콘 접합의 전자 터널링 특성)

  • 장창덕;이정석;이광우;이용재
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1998.06a
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    • pp.87-91
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    • 1998
  • In this paper, We analyzed the current-voltage characteristics with n-type silicon substrates concentration and temperature variations (Room temperature, 50$^{\circ}C$, 75$^{\circ}C$) in platinum silicide and silicon junction. The electrical parameters of measurement are turn-on voltage, saturation current, ideality factor, barrier height, dynamic resistance in forward bias and reverse breakdown voltage according to variations of junction concentration of substrates and measurement temperature variations. As a result, the forward turn-on voltage, reverse breakdown voltage, barrier height and dynamic resistance were decreased but saturation currents and ideality factor were increased by substrates increased concentration variations in platinum silicide and n-silicon junction. In increased measurement temperature (RT, 50$^{\circ}C$, 75$^{\circ}C$), the extracted electrical parameter values of characteristics were rises by increased temperature variations according to the forward and reverse bias.

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Parameter Analysis of Platinum Silicide Rectifier Junctions acceding to measurement Temperature Variations (측정 온도 변화에 따른 백금실리사이드 정류성 접합의 파라미터 분석)

  • 장창덕;이용재
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1998.05a
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    • pp.405-408
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    • 1998
  • In this paper, We analyzed the current-voltage characteristics with n-type silicon substrates concentration and temperature variations (Room temperature, 5$0^{\circ}C$, 75$^{\circ}C$) in platinum silicide and silicon junction. Measurement electrical parameters are forward turn-on voltage, reverse breakdown voltage, barrier height, saturation current, ideality factor, dynamic resistance acceding to junction concentration of substrates and temperature variations. As a result, the forward turn-on voltage, reverse breakdown voltage, barrier height and dynamic resistance were decreased but saturation current and ideality factor were increased by substrates concentration variations. Reverse breakdown voltage and dynamic resistance were increased by temperature variations.

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Low Reverse Saturation Current Density of Amorphous Silicon Solar Cell Due to Reduced Thickness of Active Layer

  • Iftiquar, S M;Yi, Junsin
    • Journal of Electrical Engineering and Technology
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    • v.11 no.4
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    • pp.939-942
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    • 2016
  • One of the most important characteristic curves of a solar cell is its current density-voltage (J-V) curve under AM1.5G insolation. Solar cell can be considered as a semiconductor diode, so a diode equivalent model was used to estimate its parameters from the J-V curve by numerical simulation. Active layer plays an important role in operation of a solar cell. We investigated the effect thicknesses and defect densities (Nd) of the active layer on the J-V curve. When the active layer thickness was varied (for Nd = 8×1017 cm-3) from 800 nm to 100 nm, the reverse saturation current density (Jo) changed from 3.56×10-5 A/cm2 to 9.62×10-11 A/cm2 and its ideality factor (n) changed from 5.28 to 2.02. For a reduced defect density (Nd = 4×1015 cm-3), the n remained within 1.45≤n≤1.92 for the same thickness range. A small increase in shunt resistance and almost no change in series resistance were observed in these cells. The low reverse saturation current density (Jo = 9.62×10-11 A/cm2) and diode ideality factor (n = 2.02 or 1.45) were observed for amorphous silicon based solar cell with 100 nm thick active layer.

The Delay time of CMOS inverter gate cell for design on digital system (디지털 시스템설계를 위한 CMOS 인버터게이트 셀의 지연시간)

  • 여지환
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 2002.06a
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    • pp.195-199
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    • 2002
  • This paper describes the effect of substrate back bias of CMOS Inverter. When the substrate back bias applied in body, the MOS transistor threshold voltage increased and drain saturation current decreased. The back gate reverse bias or substrate bias has been widely utilized and the following advantage has suppressing subthreshold leakage, lowering parasitic junction capacitance, preventing latch up or parasitic bipolar transistor, etc. When the reverse voltage applied substrate, this paper stimulated the propagation delay time CMOS inverter.

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Reliability Analysis in PtSi-nSi Devices with Concentration Variations of Junction Parts (접합 부분의 농도 변화를 갖는 PtSi-nSi 소자에서 신뢰성 분석)

  • 이용재
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.1
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    • pp.229-234
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    • 1999
  • We analyzed the reliability characteristics in platinum schottky diodes with variations of n-type silicon substrates concentrations and temperature variations of measurements. The parameters of reliability measurement analysis are saturation current. turn-on voltage and ideality factor in the forward bias, the breakdown voltage in the reverse bias with device shapes. The shape of devices are square type and long rectangular type for edge effect. As a result, we analyzed that the forward turn-on voltage, barrier height, dynamic resistance and reverse breakdown voltage were decreased but ideality factor and saturation current were increased by increased concentration in platinum and n-silicon junction parts. In measurement temperature(RT, $50^{\circ}C$, $75^{\circ}C$), the extracted electrical parameter values of reliability characteristics were increased at the higher temperature under the forward and reverse bias. The long rectangular type devices were more decreased than the square type in reverse breakdown voltage by tunneling effects of edge part.

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The Results Comparison of Measurement and Simulations in ISL(Integrated Schottky Logic) Gate (ISL 게이트에서 측정과 시뮬레이션의 결과 비교)

  • 이용재
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.1
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    • pp.157-165
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    • 2001
  • We analyzed the electrical characteristics of platinum silicide schottky junction to develope the voltage swing in Integrated Schottky Logic gates, and simulated the characteristics with the programs in this junctions. Simulation programs for analytic characteristics are the Medichi tool for device structure, Matlab for modeling and SUPREM V for fabrication process. The silicide junctions consist of PtSi and variable silicon substrate concentrations in ISL gates. Input parameters for simulation characteristics were the same conditions as process steps of the device farications process. The analitic electrical characteristics were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, the forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

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The Modeling of ISL(Intergrated Schottky Logic) Characteristics by Computer Simulations (컴퓨터 시뮬레이션에 의한 ISL 특성의 모델링)

  • 김태석
    • Journal of Korea Multimedia Society
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    • v.3 no.5
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    • pp.535-541
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    • 2000
  • In this paper, we analyzed the characteristics of schottky junction to develop the voltage swing of ISL, and simulated the characteristics with the programs at this junctions. Simulation programs for analytic characteristics are the SUPREM V, SPICE, Medichi, Matlab. The schottky junction is rectifier contact between platinum silicide and silicon, the characteristics with programs has simulated the same conditions. The analytic parameters were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, th forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

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Electrical Characteristics and Models for Asymmetric n-MOSFET′s with Irregular Source/Drain Contacts (불규칙한 소오스/드레인 금속 접촉을 갖는 비대칭 n-MOSFET의 전기적 특성 및 모델)

  • 공동욱;정환희;이재성;이용현
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.208-211
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    • 1999
  • Abstract - Electrical characteristics or asymmetric n-MOSFET's with different source and drain geometry are experimently investigated using test structures having various gate width. Saturation drain current and resistance in linear region are estimated by a simple schematic model, which consists of conventional device having parasitic resistor. A comparison of experimental results of symmetric and asymmetric devices gives the parasitic resistance caused by abnormal device structure. The suggested model shows good agreement with the measured drain current for both forward- and reverse-modes.

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Hot carrier effect of nMOSFET's at elevated temperatures (온도증가에 따른 nMOSFET의 Hot carrier effect 변화)

  • Won, Myoung-Kyu;Kim, Do-Hyung;An, Chul
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.363-366
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    • 1998
  • 25.deg. C 에서 120.deg. C까지 온도를 증가시키면서 hot carrier effect에 의한 nMOSFET의 degradation을 drain current와 transconductance의 변화를 통해 알아보았다. 온도가 증가할수록 hot carrier에 의한 degradation 이 전체적으로 줄어드는 것을 볼수 있었다. stress를 가한 후 reverse mode로 측정하였는데 saturation 영역보다 linear 영역에서 drain current의 degradation이 크게 나탔으며 온도가 증가할수록 이러한 경향이 유지되면서 degradation이 감소하였다. transconductance는 linear 영역과 saturation 영역에서 각각 측정하였는데 온도가 증가할수록 linear 영역의 degradation이 더많이 감소하였다.

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Energy Conversion Efficiency Improvement of Piezoelectric Micropower Generator Adopting Low Leakage Diodes (저누설 다이오드를 사용한 저전력 압전발전기의 효율 개선에 관한 연구)

  • Kim, Hye-Joong;Kang, Sung-Muk;Kim, Ho-Seong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.5
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    • pp.938-943
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    • 2007
  • In this paper, we show that, in case of piezoelectric micropower generator, just replacing Schottky diodes in the bridge rectifier with ultra-low reverse leakage current diodes improves the mechanical-to-electrical energy conversion efficiency by more than 100%. Experimental and PSPICE simulation results show that, due to the ultra-low leakage current, the charging speed of the circuit employing PAD1 is higher than that of the circuit employing Schottky diodes and the saturation voltage of the circuit employing PAD1 is also higher. This study suggests that , when the internal impedance of source is very large (a few tens of $M{\Omega}$) such that maximum charging current is a few microamperes or less, in order to realize literally the energy scavenging system, ultra-low reverse leakage current diodes should be used for efficient energy conversion. Since low-level vibration is ubiquitous in the environment ranging from human movement to large infrastructures and the mechanical-to-electrical energy conversion efficiency is much more critical for use of these vibrations, we believe that the improvement in the efficiency using ultra-low leakage diodes, as found in this work, will widen greatly the application of piezoelectric micropower generator.