• Title/Summary/Keyword: Resistance random access memory

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Electrical Properties of Phase Change Memory Device with Novel GST/TiAlN structure (Novel GST/TiAlN 구조를 갖는 상변화 메모리 소자의 전기적 특성)

  • Lee, Nam-Yeal;Choi, Kyu-Jeong;Yoon, Sung-Min;Ryu, Sang-Ouk;Park, Young-Sam;Lee, Seung-Yun;Yu, Byoung-Gon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.118-119
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    • 2005
  • PRAM (Phase Change Random Access Memory) is well known to use reversible phase transition between amorphous (high resistance) and crystalline (low resistance) states of chalcogenide thin film by electrical Joule heating. In this paper, we introduce a stack-type PRAM device with a novel GST/TiAlN structures (GST and a heating layer of TiAlN), and report its electrical switching properties. XRD analysis result of GST thin film indicates that the crystallization of the GST film start at about $200^{\circ}C$. Electrical property results such as I-V & R-V show that the phase change switching operation between set and reset states is observed, as various input electrical sources are applied.

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Field-induced Resistive Switching in Ge-Se Based ReRAM

  • Lee, Gyu-Jin;Eom, Jun-Gyeong;Jeong, Ji-Su;Jang, Hye-Jeong;Kim, Jang-Han;Jeong, Hong-Bae
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.342-342
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    • 2012
  • Resistance-change Random Access Memory (ReRAM), which utilizes electrochemical control of nanoscale quantities of metal in thin films of solid electrolyte, shows great promise as a future solid state memory. The technology utilizes the electrochemical formation and removal of metallic pathways in thin films of solid electrolyte. Key attributes are low voltage and current operation, excellent scalability, and a simple fabrication sequence. In this study, we investigated the nature of thin films formed by photo doping of Ag+ ions into chalcogenide materials for use in solid electrolyte of programmable metallization cell devices. We measured the I-V characteristics by field-effect of the device. The results imply that a Ag-rich phase separates owing to the reaction of Ag with free atoms from chalcogenide materials.

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A New Reference Cell for 1T-1MTJ MRAM

  • Lee, S.Y.;Kim, H.J.;Lee, S.J.;Shin, H.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.2
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    • pp.110-116
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    • 2004
  • We propose a novel sensing scheme, which operates by sensing the difference in voltage between a memory cell and a reference cell for a magneto-resistive random access memory (MRAM). A new midpoint-reference generation circuit is adopted for the reference cell to improve the sensing margin and to guarantee correct operation of sensing circuit for wide range of tunnel magneto resistance (TMR) voltages. In this scheme, the output voltage of the reference cell becomes nearly the midpoint between the cell voltages of high and low states even if the voltage across the magnetic tunnel junction (MTJ) varies.

Flash-Conscious Storage Management Method for DBMS using Dynamic Log Page Allocation (동적 로그 페이지 할당을 이용한 플래시-고려 DBMS의 스토리지 관리 기법)

  • Song, Seok-Il;Khil, Ki-Jeong;Choi, Kil-Seong
    • Journal of Advanced Navigation Technology
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    • v.14 no.5
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    • pp.767-774
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    • 2010
  • Due to advantages of NAND flash memory such as non-volatility, low access latency, low energy consumption, light weight, small size and shock resistance, it has become a better alternative over traditional magnetic disk drives, and has been widely used. Traditional DBMSs including mobile DBMSs may run on flash memory without any modification by using Flash Translation Layer (FTL), which emulates a random access block device to hide the characteristics of flash memory such as "erase-before-update". However, most existing FTLs are optimized for file systems, not for DBMSs, and traditional DBMSs are not aware of them. Also, traditional DBMSs do not consider the characteristics of flash memory. In this paper, we propose a flash-conscious storage system for DBMSs that utilizes flash memory as a main storage medium, and carefully put the characteristics of flash memory into considerations. The proposed flash-conscious storage system exploits log records to avoid costly update operations. It is shown that the proposed storage system outperforms the state.

Electrical Switching Characteristics of Ge1Se1Te2 Chalcogenide Thin Film for Phase Change Memory

  • Lee, Jae-Min;Yeo, Cheol-Ho;Shin, Kyung;Chung, Hong-Bay
    • Transactions on Electrical and Electronic Materials
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    • v.7 no.1
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    • pp.7-11
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    • 2006
  • The changes of the electrical conductivity in chalcogenide amorphous semiconductors, $Ge_{1}Se_{1}Te_{2}$, have been studied. A phase change random access memory (PRAM) device without an access transistor is successfully fabricated with the $Ge_{1}Se_{1}Te_{2}$-phase-change resistor, which has much higher electrical resistivity than $Ge_{2}Sb_{2}Te_{5}$ and its electric resistivity can be varied by the factor of $10^5$ times, relating with the degree of crystallization. 100 nm thick $Ge_{1}Se_{1}Te_{2}$ thin film was formed by vacuum deposition at $1.5{\times}10^{-5}$ Torr. The static mode switching (DC test) is tested for the $100\;{\mu}m-sized$ $Ge_{1}Se_{1}Te_{2}$ PRAM device. In the first sweep, the amorphous $Ge_{1}Se_{1}Te_{2}$ thin film showed a high resistance state at low voltage region. However, when it reached to the threshold voltage, $V_{th}$, the electrical resistance of device was drastically reduced through the formation of an electrically conducting path. The pulsed mode switching of the $20{\mu}m-sized$ $Ge_{1}Se_{1}Te_{2}$ PRAM device showed that the reset of device was done with a 80 ns-8.6 V pulse and the set of device was done with a 200 ns-4.3 V pulse.

Nonvolatile Memory and Photovoltaic Devices Using Nanoparticles

  • Kim, Eun Kyu;Lee, Dong Uk
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.79-79
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    • 2013
  • Quantum-structures with nanoparticles have been attractive for various electronic and photonic devices [1,2]. In recent, nonvolatile memories such as nano-floating gate memory (NFGM) and resistance random access memory (ReRAM) have been studied using silicides, metals, and metal oxides nanoparticles [3,4]. In this study, we fabricated nonvolatile memories with silicides (WSi2, Ti2Si, V2Si) and metal-oxide (Cu2O, Fe2O3, ZnO, SnO2, In2O3 and etc.) nanoparticles embedded in polyimide matrix, and photovoltaic device also with SiC nanoparticles. The capacitance-voltageand current-voltage data showed a threshold voltage shift as a function of write/erase voltage, which implies the carrier charging and discharging into the metal-oxide nanoparticles. We have investigated also the electrical properties of ReRAM consisted with the nanoparticles embedded in ZnO, SiO2, polyimide layer on the monolayered graphene. We will discuss what the current bistability of the nanoparticle ReRAM with monolayered graphene, which occurred as a result of fully functional operation of the nonvolatile memory device. A photovoltaic device structure with nanoparticles was fabricated and its optical properties were also studied by photoluminescence and UV-Vis absorption measurements. We will discuss a feasibility of nanoparticles to application of nonvolatile memories and photovoltaic devices.

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HSPICE Macro-Model and Midpoint-Reference Generation Circuits for MRAM (MRAM용 HSPICE 마크로 모델과 midpoint reference 발생 회로에 관한 연구)

  • 이승연;이승준;신형순
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.8
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    • pp.105-113
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    • 2004
  • MRAM uses magneto-resistance material as a storage element, which stores cell data as a polarization of spin in a free magnetic layer. This magneto-resistance material has hysteresis, asteroid curve at the thermal variation, and R-V characteristics for switching the data. Therefore, a macro-model which can reproduce these characteristics is required for MRAM simulation. We propose a macro-model of TMR (Tunneling Magneto Resistance) that can reproduce all of these characteristics on HSPICE. Also we propose a novel sensing scheme, which generates reference resistance having the medium value, ( $R_{H}$+ $R_{L}$)/2, for a wide range of applied voltage and present simulation results based on the HSPICE macro-model of MTJ that we have developed.d.d.

The Effects of Mn-doping and Electrode Material on the Resistive Switching Characteristics of ZnOxS1-x Thin Films on Plastic

  • Han, Yong;Cho, Kyoungah;Park, Sukhyung;Kim, Sangsig
    • Transactions on Electrical and Electronic Materials
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    • v.15 no.1
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    • pp.24-27
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    • 2014
  • In this study, the effects of Mn-doping and the electrode materials on the memory characteristics of $ZnO_xS_{1-x}$ resistive random access memory (ReRAM) devices on plastic are investigated. Compared with the undoped Al/$ZnO_xS_{1-x}$/Au and Al/$ZnO_xS_{1-x}$/Cu devices, the Mn-doped ones show a relatively higher ratio of the high resistance state (HRS) to low resistance state (LRS), and narrower resistance distributions in both states. For the $ZnO_xS_{1-x}$ devices with bottom electrodes of Cu, more stable conducting filament paths are formed near these electrodes, due to the relatively higher affinity of copper to sulfur, compared with the devices with bottom electrodes of Au, so that the distributions of the set and reset voltages get narrower. For the Al/$ZnO_xS_{1-x}$/Cu device, the ratio of the HRS to LRS is above $10^6$, and the memory characteristics are maintained for $10^4$ sec, which values are comparable to those of ReRAM devices on Si or glass substrates.

An Atomistic Modeling for Electromechanical Nanotube Memory Study (원자단위 Electromechanical 모델링을 통한 나노튜브 메모리 연구)

  • Lee, Kang-Whan;Kwon, Oh-Keun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.2
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    • pp.116-125
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    • 2006
  • We have presented a nanoelectromechanical (NEM) model based on atomistic simulations. Our models were applied to a NEM device as called a nanotube random access memory (NRAM) operated by an atomistic capacitive model including a tunneling current model. We have performed both static and dynamic analyses of a NRAM device. The turn-on voltage obtained from molecular dynamics simulations was less than the half of the turn-on voltage obtained from the static simulation. Since the suspended carbon nanotube (CNT) oscillated with the amplitude for the oscillation center under an externally applied force, the quantity of the CNT-gold interaction in the static analysis was different from that in the dynamic analysis. When the gate bias was applied, the oscillation centers obtained from the static analysis were different from those obtained from the dynamics analysis. Therefore, for the range of the potential difference that the CNT-gold interaction effects in the static analysis were negligible, the vibrations of the CNT in the dynamics analysis significantly affected the CNT-gold interaction energy and the turn-on voltage. The turn-on voltage and the tunneling resistance obtained from our tunneling current model were in good agreement with previous experimental and theoretical works.

Block Associativity Limit Scheme for Efficient Flash Translation Layer (효율적인 플래시 변환 계층을 위한 블록 연관성 제한 기법)

  • Ok, Dong-Seok;Lee, Tae-Hoon;Chung, Ki-Dong
    • Journal of KIISE:Computing Practices and Letters
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    • v.16 no.6
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    • pp.673-677
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    • 2010
  • Recently, NAND flash memory has been widely used in embedded systems, personal computers, and server systems because of its attractive features, such as non-volatility, fast access speed, shock resistance, and low power consumption. Due to its hardware characteristics, specifically its 'erase-before-write' feature, Flash Translation Layer is required for using flash memory like hard disk drive. Many FTL schemes have been proposed, but conventional FTL schemes have problems such as block thrashing and block associativity problem. The KAST scheme tried to solve these problems by limiting the number of associations between data block and log block to K. But it has also block thrashing problem in random access I/O pattern. In this paper, we proposed a new FTL scheme, UDA-LBAST. Like KAST, the proposed scheme also limits the log block association, but does not limit data block association. So we could minimize the cost of merge operations, and reduce merge costs by using a new block reclaim scheme, log block garbage collection.