• Title/Summary/Keyword: Reference Bandwidth

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Adaptive Bandwidth Algorithm for Optimal Signal Tracking of DGPS Reference Receivers

  • Park, Sang-Hyun;Cho, Deuk-Jae;Seo, Ki-Yeol;Suh, Sang-Hyun
    • Journal of Navigation and Port Research
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    • v.31 no.9
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    • pp.763-769
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    • 2007
  • A narrow loop noise bandwidth method is desirable to reduce the error of raw measurements due to the thermal noise. However, it degrades the performance of GPS initial synchronization such as mean acquisition time. And it restricts the loop noise bandwidth to a fixed value determined by the lower bound of the allowable range of carrier-to-noise power ratio, so that it is difficult to optimally track GPS signal. In order to make up for the weak points of the fixed-type narrow loop noise bandwidth method and simultaneously minimize the error of code and carrier measurements, this paper proposes a stepwise-type adaptive bandwidth algorithm for DGPS reference receivers. In this paper, it is shown that the proposed adaptive bandwidth algorithm can provide more accurate measurements than those of the fixed-type narrow loop noise bandwidth method, in view of analyzing the simulation results between two signal tracking algorithms. This paper also carries out sensitivity analysis of the proposed adaptive bandwidth algorithm due to the estimation uncertainty of carrier-to-noise power ratio. Finally the analysis results are verified by the experiment using GPS simulator.

A linear systolic array based architecture for full-search block matching motion estimator (선형 시스토릭 어레이를 이용한 완전탐색 블럭정합 이동 예측기의 구조)

  • 김기현;이기철
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.2
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    • pp.313-325
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    • 1996
  • This paper presents a new architecture for full-search block-matching motion estimation. The architecture is based on linear systolic arrays. High speed operation is obtained by feeding reference data, search data, and control signals into the linear systolic array in a pipelined fashion. Input data are fed into the linear systolic array at a half of the processor speed, reducing the required data bandwidth to half. The proposed architecture has a good scalability with respect to the number of processors and input bandwidth when the size of reference block and search range change.

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A Low Jitter and Fast Locking Phase-Lock Loop with Adaptive Bandwidth Controller

  • Song Youn-Gui;Choi Young-Shig
    • Journal of information and communication convergence engineering
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    • v.3 no.1
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    • pp.18-22
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    • 2005
  • This paper presents the analog adaptive phase-locked loop (PLL) architecture with a new adaptive bandwidth controller to reduce locking time and minimize jitter in PLL output for wireless communication. It adaptively controls the loop bandwidth according to the locking status. When the phase error is large, the PLL increases the loop bandwidth and reduces locking time. When the phase error is small, the PLL decreases the loop bandwidth and minimizes output jitters. The adaptive bandwidth control is implemented by controlling charge pump current depending on the locking status. A 1.28-GHz CMOS phase-locked loop with adaptive bandwidth control is designed with 0.35 $mu$m CMOS technology. It is simulated by HSPICE and achieves the primary reference sidebands at the output of the VCO are approximately -80dBc.

High gain and broad bandwidth antenna design using cylindrical magneto material (원통형 자성체를 이용한 고이득 및 광대역 안테나 설계)

  • Lee, Ji-Chul;Min, Kyeong-Sik
    • Journal of Navigation and Port Research
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    • v.34 no.1
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    • pp.21-26
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    • 2010
  • This paper describes patch antenna design method of antenna high gain and broad bandwidth using cylindrical magneto material around feeding line. Strong current induction method applied combination to generate magnetic fields around feeding line for antenna high gain characteristic and principle of PIFA designed application for design of antenna broadband. In case of single CMM, gain increased 3.96 dB compare with the reference antenna gain however bandwidth characteristic not increased compare with the reference antenna. In case of dual CMM, gain improved about 10 dB compare with the reference antenna and -10 below bandwidth is 700 MHz(50 MHz~750 MHz) with this paper designed high gain characteristic.

BLOCK-BASED ADAPTIVE BIT ALLOCATION FOR REFENCE MEMORY REDUCTION

  • Park, Sea-Nae;Nam, Jung-Hak;Sim, Dong-Gy;Joo, Young-Hun;Kim, Yong-Serk;Kim, Hyun-Mun
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2009.01a
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    • pp.258-262
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    • 2009
  • In this paper, we propose an effective memory reduction algorithm to reduce the amount of reference frame buffer and memory bandwidth in video encoder and decoder. In general video codecs, decoded previous frames should be stored and referred to reduce temporal redundancy. Recently, reference frames are recompressed for memory efficiency and bandwidth reduction between a main processor and external memory. However, these algorithms could hurt coding efficiency. Several algorithms have been proposed to reduce the amount of reference memory with minimum quality degradation. They still suffer from quality degradation with fixed-bit allocation. In this paper, we propose an adaptive block-based min-max quantization that considers local characteristics of image. In the proposed algorithm, basic process unit is $8{\times}8$ for memory alignment and apply an adaptive quantization to each $4{\times}4$ block for minimizing quality degradation. We found that the proposed algorithm could improve approximately 37.5% in coding efficiency, compared with an existing memory reduction algorithm, at the same memory reduction rate.

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Design of a Low Memory Bandwidth Inter Predictor Using Implicit Weighted Prediction Technique (묵시적 가중 예측기법을 이용한 저 메모리 대역폭 인터 예측기 설계)

  • Kim, Jinyoung;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.12
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    • pp.2725-2730
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    • 2012
  • In this paper, for improving the H.264/AVC hardware performance, we propose an inter predictor hardware design using a multi reference frame selector and an implicit weighted predictor. previous reference frame are reused for Low Memory Bandwidth. The size of the reference memory in the predictor was reduced by about 46% and the external memory access rate was reduced by about 24% compared with the one in the reference software JM16.0. We designed the proposed system with Verilog-HDL and synthesized inter predictor circuit using the Magnachip 0.18um CMOS standard cell library. The synthesis result shows that the gate count is about 2,061k and the design can run at 91MHz.

A Clock and Data Recovery Circuit with Adaptive Loop Bandwidth Calibration and Idle Power Saved Frequency Acquisition

  • Lee, Won-Young;Jung, Chae Young;Cho, Ara
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.4
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    • pp.568-576
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    • 2017
  • This paper presents a clock and data recovery circuit with an adaptive loop bandwidth calibration scheme and the idle power saved frequency acquisition. The loop bandwidth calibration adaptively controls injection currents of the main loop with a trimmable bandgap reference circuit and trains the VCO to operate in the linear frequency control range. For stand-by power reduction of the phase detector, a clock gating circuit blocks 8-phase clock signals from the VCO and cuts off the current paths of current mode D-flip flops and latches during the frequency acquisition. 77.96% reduction has been accomplished in idle power consumption of the phase detector. In the jitter experiment, the proposed scheme reduces the jitter tolerance variation from 0.45-UI to 0.2-UI at 1-MHz as compared with the conventional circuit.

Optimal Bandwidth Allocation and QoS-adaptive Control Co-design for Networked Control Systems

  • Ji, Kun;Kim, Won-Jong
    • International Journal of Control, Automation, and Systems
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    • v.6 no.4
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    • pp.596-606
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    • 2008
  • In this paper, we present a co-design methodology of dynamic optimal network-bandwidth allocation (ONBA) and adaptive control for networked control systems (NCSs) to optimize overall control performance and reduce total network-bandwidth usage. The proposed dynamic co-design strategy integrates adaptive feedback control with real-time scheduling. As part of this co-design methodology, a "closed-loop" ONBA algorithm for NCSs with communication constraints is presented. Network-bandwidth is dynamically assigned to each control loop according to the quality of performance (QoP) information of each control loop. As another part of the co-design methodology, a network quality of service (QoS)-adaptive control design approach is also presented. The idea is based on calculating new control values with reference to the network QoS parameters such as time delays and packet losses measured online. Simulation results show that this co-design approach significantly improves overall control performance and utilizes less bandwidth compared to static strategies.

Method of Measuring the Occupied Bandwidth of IS-95 Base Station at Remote Site

  • Lim, Jong-Soo;Kim, Sang-Tae
    • Journal of electromagnetic engineering and science
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    • v.3 no.1
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    • pp.7-11
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    • 2003
  • CDMA(code division multiple access) has very large peak to average power ratio(PAR) and behave as noise-like wide band digital signals with 1.2288 Mbps transmission rate. For signals with high PAR like CDMA, it is reasonable to prescribe occupied bandwidth(OBW) as average occupied bandwidth. Bandwidth measurements of CDMA signals at remote site are affected by co-channel and adjacent channel interference from adjacent CDMA base station, distortion of signal by fading effect, spurious emission and environment noises. In this study, we have compared OBW measurements in an on-air environment with those measured in a base station using adjacent channel leakage ratio(ACLR) as a reference measurement factor. As results of analysis, the OBW at ACLR$\geq$35 ㏈ shows nearly same statistical characteristics regardless of the measurement locations and environments.

Design and Implementation of Bandwidth Management Algorithm for Video Conference System (화상회의 시스템을 위한 대역폭 관리 알고리즘 설계 및 구현)

  • 구명모;정상운;김상복
    • Journal of Korea Multimedia Society
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    • v.3 no.4
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    • pp.399-406
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    • 2000
  • There are sendee_based research and receiver_based research for dynamic adaptation to network congestion which arises from multicast video conference ; the former results in bandwidth waste of receivers who use high available bandwidth on account of average loss rate in transmission rate, the latter in short of the method that divides layers of available bandwidth of receivers dynamically. In order to do so, in this paper, we established two multicast groups divided into non-congestion status and congestion status according to receiver's network state, and implemented the bandwidth management algorithm which is designed for providing receivers with profitable qualities for available bandwidth by letting them choose each group dynamically in reference to loss rate. As a result, experiments proved that bandwidth waste problem was improved by receiver's dynamic choice according to loss rate.

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