• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1996년도 추계학술대회 논문집
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• pp.593-597
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• 1996

This paper describes a method for drawing check of dimension errors, such as deficiency and redundancy of dimensions, input-errors in dimension figures and symbols, etc. The logic for finding dimensional errors is written by using the Turbo C language. Checking for deficiency and redundancy of global dimensions has been performed applying Graph Theory. Especialy, this paper gives an account of checking method for annular parts.

• Structural Engineering and Mechanics
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• 제59권1호
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• pp.15-36
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• 2016

The components of the seismic behavior factor of RC frames are expected to change as structural redundancy increases. Most researches indicate that increasing redundancy is desirable in response to stochastic events such as earthquake loading. The present paper investigated the effect of redundancy on a fixed plan for seismic behavior factor components and the nonlinear behavior of RC frames. The 3D RC moment resistant frames with equal lateral resistance were designed to examine the role of redundancy in earthquake-resistant design and to distinguish it from total overstrength capacity. The seismic behavior factor and dynamic behavior of structures under natural strong ground motions were numerically evaluated as the judging criteria for structural seismic behavior. The results indicate that increasing redundancy alone in a fixed plan cannot be defined as a criterion for improving the structural seismic behavior.

• 한국항공우주학회지
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• 제39권12호
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• pp.1150-1159
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• 2011

신뢰도란 임의 시스템이 주어진 운용환경 하에서 의도한 기간 동안 의도된 기능을 정상적으로 수행할 확률로 정의된다. 신뢰도-중복 최적화 문제(RROP)는 비용, 무게 등의 제약내에서 시스템의 신뢰도를 최대화할 수 있는 최적의 부품을 선택하고, 부품수와 중복전략(활성/대기중복)을 결정하는 문제이다. 본 연구에서는 아리랑위성 2호의 다채널광학카메라(MSC) 시스템의 설계 구조를 바탕으로 RROP의 수리모형을 제시하고, NP-hard인 RROP의 해법으로써 병렬 개체군집최적화(PPSO) 알고리즘을 제안하였다. RROP 예제의 수치실험 결과는 계획된 수명기간에서 신뢰도를 최대화하는 시스템의 설계 구조를 제시한다.

• 한국CDE학회논문집
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• 제1권2호
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• pp.97-106
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• 1996

Existing CAD systems do not provide advanced functions for automatic checking design and drafting errors in mechanical drawings. If the knowledge of checking in mechanical ddrsfting can be implemented into computers, CAD systems could automatically check for design and drafting errors. This paper describes a method for systematic checking of dimension errors. such as deficiency and/or redundancy of dimension input-errors in dimension figures and symbols, etc. The logic for finding dimensional errors is written by using a proccedural language. A geometric model and a topological-graph model are used in this method. Checking for deficiency and redundancy of dimensions is based upon graph Theory.

• 상하수도학회지
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• 제11권1호
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• pp.21-32
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• 1997

Optimum design of water distribution network(WDN) in many times means just reducing redundancy. Given only a few situations are taken into consideration for such design, WDN deprived of inherited redundancy may not work properly in some unconsidered cases. Quantifying redundancy and incorporating it into the optimal design process will be a way of overcoming just reduction of redundancy. Expected shortage is developed as a reliability surrogate in WDN. It is an indicator of the frequency, duration and severity of failure. Using this surrogate, Expected Shortage Optimization Model (ESOM) is developed. ESOM is tested with an example network and results are analyzed and compared with those from other reliability models. The analysis results indicate that expected shortage is a quantitative surrogate measure, especially, good in comparing different designs and obtaining tradeoff between cost and. reliability. In addition, compared other models, ESOM is also proved useful in optimizing WDN with reliability and powerful in controlling reliability directly in the optimization process, even if computational burden is high. Future studies are suggested which focus on how to increase applicability and flexibility of ESOM.

• 한국정보통신학회논문지
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• 제19권12호
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• pp.2828-2835
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• 2015

본 논문에서는 다양한 다중화 모형과 논스톱 포워딩 기능이 네트워크 서비스의 가용도에 미치는 영향을 비교 분석한다. 다중화 모형 중 no redundancy, 2N redundancy, N-way redundancy, N-way active redundancy 모형에 대한 확률적 리워드 네트(Stochastic Reward Net, SRN) 모델을 설계하고, 각각의 모형에 대해 논스톱 포워딩 기능을 추가한 SRN 모델을 설계한다. 확률적 페트리 네트 패키지(Stochastic Petri Net Package, SPNP)를 활용하여 설계한 SRN 모델의 가용도를 구한다.

• 품질경영학회지
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• 제32권4호
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• pp.125-139
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• 2004

Generally, parallel redundancy is used to improve reliability in many systems. However, redundancy increases system cost, weight, volume, power, etc. Due to limited availability of these resources, the system designer has to maximize reliability subject to various constraints or minimize resources while satisfying the minimum requirement of system reliability. This paper presents GAs (Genetic Algorithms) to solve redundancy allocation in series-parallel systems. To apply the GAs to this problem, we propose a genetic representation, the method for initial population construction, evaluation and genetic operators. Especially, to improve the performance of GAs, we develop heuristic operators (heuristic crossover, heuristic mutation) using the reliability-resource information of the chromosome. Experiments are carried out to evaluate the performance of the proposed algorithm. The performance comparison between the proposed algorithm and a pervious method shows that our approach is more efficient.

• 한국품질경영학회:학술대회논문집
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• 한국품질경영학회 1998년도 The 12th Asia Quality Management Symposium* Total Quality Management for Restoring Competitiveness
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• pp.393-403
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• 1998

The advent of very large scale integration(VLSI) has had a tremendous impact on the design of fault-tolerant circuits and systems. The increasing density, decreasing power consumption, and decreasing costs of integrated circuits, due in part to VLSI, have made it possible and practical to implement the redundancy approaches used in fault-tolerant computing. The purpose of this paper is to study the many aspects of designing fault-tolerant systems in a VLSI environment. First, we expound upon the opportunities and problemes presented by VLSI technology. Second, we consider in detail the importance of design mistakes, common-mode failures, and transient faults in VLSI. Finally, we examine the techniques available to implement redundancy using VLSI and the problems associated with these techniques.

• 산업경영시스템학회지
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• 제22권53호
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• pp.111-120
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• 1999

The advent of very large scale integration(VLSI) has had a tremendous impact on the design of fault-tolerant circuits and systems. The increasing density, decreasing power consumption, and decreasing costs of integrated circuits, due in part to VLSI, have made it possible and practical to implement the redundancy approaches used in fault-tolerant computing. The purpose of this paper is to study the many aspects of designing fault-tolerant systems in a VLSI environment. First, we expound upon the opportunities and problems presented by VLSI technology. Second, we consider in detail the importance of design mistakes, common-mode failures, and transient faults in VLSI. Finally, we examine the techniques available to implement redundancy using VLSI and the promlems associated with these techniques.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1994년도 추계학술대회 논문집
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• pp.847-851
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• 1994

Existing CAD systems do not provide the advanced function for systematic checking of design and drafting errors in mechanical drawings. This paper describes a method for systematic checking in mechanical drawings. The checking items are deficiency and redundancy of dimensions, input-errors in dimension figures and symbols, etc. Checking for deficiency and redundancy of global dimensions has been performed applying Graph Theory. This system has been applied to several examples and we have confirmed the feasibility of this design checking method.