• Journal of Sensor Science and Technology
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• v.21 no.1
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• pp.59-67
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• 2012

It was reported that the latest sensor technology allow an 65536 conductive polymer sensor array to be made with broad but overlapping selectivity to different families of chemicals emulating the characteristics found in biological olfaction. However, the supernumerary redundancy always accompanies great error and risk as well as an inordinate amount of computation time and local minima in signal processing, e.g. neural networks. In this paper, we propose a new method to reduce the number of sensor for analysis by reducing redundancy between sensors and by removing unstable sensors using the cosine similarity method and to decide on representative sensor using FCM(Fuzzy C-Means) algorithm. The representative sensors can be just used in analyzing. And, we introduce DWT(Discrete Wavelet Transform) for data compression in the time domain as preprocessing. Throughout experimental trials, we have done a comparative analysis between gas sensor data with and without reduced redundancy. The possibility and superiority of the proposed methods are confirmed through experiments.

• Journal of the Korean Society of Industry Convergence
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• v.24 no.6_2
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• pp.827-839
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• 2021

Due to climate change and population growth, water scarcity is getting worse all over the world. Among various methods for desalination of seawater, the Multi-Effect Adsorptive Desalination method, which combines the existing Multi-Effect Desalination method and the Adsorptive Desalination method and can produce high-concentration-high-concentration freshwater, is emerging. Because the Multi-Effect Adsorptive Desalination method combines the two different methods, the system becomes complicated and the possibility of failure increases. Therefore, in this study, availability analysis was performed on the Multi-Effect Adsorptive Desalination process. A total of four types of reliability block diagrams were presented, and availability analysis was conducted based on them. The first form of a reliability block diagram is configured in series without any redundancy. The availability of the reliability block diagram composed of the serial system was found to be lower than the required availability. In order to increase availability, the redundancy to pumps and boiler are added to system. As a result of availability analysis, it was confirmed that designing desalination systems with redundancy to pump meets the 93% availability, which is typically required availability for various plants.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.9
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• pp.1717-1722
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• 2016

Availability, one of the important metrics used to assess the performance of network system, is defined as the probability that a system is operational at a given point in time under a given set of environmental conditions. To improve the availability of the network service, the redundancy models and the rejuvenation schemes are the effective schemes to be typically used. In this paper, we analyse the effect of 2N redundancy model and/or rejuvenation scheme on the availability of network service. The 2N redundancy model consists of one active and one standby component and the performance of time-based rejuvenation scheme mainly depends on its rejuvenation period. We design stochastic reward net model for the 2N redundancy model with time-based rejuvenation scheme and analyse the service availability of the model using stochastic Petri net package. We provide some numerical examples of the service availability, which shows that the system with rejuvenation has higher availability than the system without rejuvenation.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.26 no.4A
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• pp.611-620
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• 2006

The composite two plate-girder bridges are generally defined as a non-redundant load path structure because the bridge can collapse if one of the two girders is seriously damaged by a fatigue crack. In this paper, a numerical study on the evaluation of the after-fracture redundancy of the composite two-girder bridges was accomplished. The evaluation has been performed on the simple and three-span continuous bridges with I-section cross beams which serve as transverse bracing, and with or without the bottom lateral bracing system. The load carrying capacities of the intact and damaged bridges with or without lateral bracing were evaluated from material and geometric nonlinear analysis, respectively and the redundancy was evaluated for each case. It was acknowledged from the analytical results that both simple and continuous intact two-girder bridges have sufficient redundancy even without lateral bracing, but it takes an important role to improve the redundancy of damaged bridges.

• KIPS Transactions on Computer and Communication Systems
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• v.3 no.5
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• pp.129-140
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• 2014

BIST(Built-in self test) is to detect various faults of the existing memory and BIRA(Built-in redundancy analysis) is to repair detected faults by allotting spare. Also, BISR(Built-in self repair) which integrates BIST with BIRA, can enhance the whole memory's yield. However, the previous methods were suggested for RAM and are difficult to diagnose disturbance that is NAND-type flash memory's intrinsic fault when used for the NAND-type flash memory with different characteristics from RAM's memory structure. Therefore, this paper suggests a BISD(Built-in self diagnosis) to detect disturbance occurring in the NAND-type flash memory and to diagnose the location of fault, and BISR to repair faulty blocks.

• Journal of Korean Society of Water and Wastewater
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• v.11 no.1
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• pp.21-32
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• 1997

Optimum design of water distribution network(WDN) in many times means just reducing redundancy. Given only a few situations are taken into consideration for such design, WDN deprived of inherited redundancy may not work properly in some unconsidered cases. Quantifying redundancy and incorporating it into the optimal design process will be a way of overcoming just reduction of redundancy. Expected shortage is developed as a reliability surrogate in WDN. It is an indicator of the frequency, duration and severity of failure. Using this surrogate, Expected Shortage Optimization Model (ESOM) is developed. ESOM is tested with an example network and results are analyzed and compared with those from other reliability models. The analysis results indicate that expected shortage is a quantitative surrogate measure, especially, good in comparing different designs and obtaining tradeoff between cost and. reliability. In addition, compared other models, ESOM is also proved useful in optimizing WDN with reliability and powerful in controlling reliability directly in the optimization process, even if computational burden is high. Future studies are suggested which focus on how to increase applicability and flexibility of ESOM.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.12
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• pp.1640-1648
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• 2014

This paper proposes a switching frequency reduction method for MMC (Modular Multilevel Converter) utilizing redundancy operation of sub-module, which can offer reduction of voltage harmonics and switching loss. The feasibility of proposed method was verified through computer simulations with PSCAD/EMTDC software. Based on simulation analysis, a hardware scaled-model of 10kVA, DC-1000V MMC was designed and manufactured in the lab. Various experiments were conducted to verify the feasibility of proposed method in the actual hardware system. The hardware scaled-model can be effectively utilized for analyzing the performance of MMC according to the modulation scheme and redundancy operation.

• Proceedings of the Korean Society for Quality Management Conference
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• 1998.11a
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• pp.393-403
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• 1998

The advent of very large scale integration(VLSI) has had a tremendous impact on the design of fault-tolerant circuits and systems. The increasing density, decreasing power consumption, and decreasing costs of integrated circuits, due in part to VLSI, have made it possible and practical to implement the redundancy approaches used in fault-tolerant computing. The purpose of this paper is to study the many aspects of designing fault-tolerant systems in a VLSI environment. First, we expound upon the opportunities and problemes presented by VLSI technology. Second, we consider in detail the importance of design mistakes, common-mode failures, and transient faults in VLSI. Finally, we examine the techniques available to implement redundancy using VLSI and the problems associated with these techniques.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.22 no.53
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• pp.111-120
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• 1999

The advent of very large scale integration(VLSI) has had a tremendous impact on the design of fault-tolerant circuits and systems. The increasing density, decreasing power consumption, and decreasing costs of integrated circuits, due in part to VLSI, have made it possible and practical to implement the redundancy approaches used in fault-tolerant computing. The purpose of this paper is to study the many aspects of designing fault-tolerant systems in a VLSI environment. First, we expound upon the opportunities and problems presented by VLSI technology. Second, we consider in detail the importance of design mistakes, common-mode failures, and transient faults in VLSI. Finally, we examine the techniques available to implement redundancy using VLSI and the promlems associated with these techniques.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.209-210
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• 2014

In this paper, a hardware prototype for the 10kVA 11-level MMC was built and various experimental works were conducted to verify the operation algorithms of MMC. The hardware prototype was designed using computer simulation with PSCAD/EMTDC software. After manufactured in the lab, the hardware prototype was tested to verify the modulation algorithms to form the output voltage, the balancing algorithm to equalize the sub-module capacitor voltage, and the redundancy operation algorithm to improve the system reliability.