• 제목/요약/키워드: Reconfigurability

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Transmission Characteristics of Curved Reconfigurable Frequency Selective Structure (곡면 재구성 주파수 선택막의 투과특성)

  • Lee, In-Gon;Hong, Ic-Pyo;Chun, Heoung-Jae;Park, Yong-Bae;Kim, Yoon-Jae
    • Journal of the Korea Institute of Military Science and Technology
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    • v.17 no.3
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    • pp.311-317
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    • 2014
  • In this paper, the flexible and reconfigurable frequency selective surface for C-band was designed using patch array and grid structure for radome and other curved surface applications. Frequency reconfigurability was obtained by varying the capacitance of varactor diode and flexibility is implemented by using flexible PCB. For the validity of the proposed structure, we fabricated the flexible and reconfigurable frequency selective structure and measured the frequency reconfigurability for different bias voltages and different curvature surfaces from the optimized design parameters. From the measurement results, we know that the proposed structure has the wideband reconfigurable frequency bandwidth of 6.05-7.08GHz. We can apply this proposed structure to the curved surface like as radome of aircraft or warship.

Design and Verification of Dynamically Reconfigurable DES (동적 재구성가능 DES의 설계 및 검증)

  • 안민희;양세양;윤재근
    • Journal of KIISE:Computing Practices and Letters
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    • v.9 no.5
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    • pp.560-566
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    • 2003
  • Recently, many researches on RC(Reconfigurable Computing) with highly complex FPGA's and reconfigurable processors have been reported, and even some attempts for commercialization have been successful. In this paper, we introduce the design methodology for implementing DES crypto algorithm on small-capacity FPGA by using its dynamic reconfigurability and a system-level verification technique. Throughout this design project, we could evaluate the effectiveness of this approach, which is the dynamic reconfigurability of FPGAs makes the efficient trade-off between the performance and the cost robustly viable.

A class of actuated deployable and reconfigurable multilink structures

  • Phocas, Marios C.;Georgiou, Niki;Christoforou, Eftychios G.
    • Advances in Computational Design
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    • v.7 no.3
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    • pp.189-210
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    • 2022
  • Deployable structures have the ability to shift from a compact state to an expanded functional configuration. By extension, reconfigurability is another function that relies on embedded computation and actuators. Linkage-based mechanisms constitute promising systems in the development of deployable and reconfigurable structures with high flexibility and controllability. The present paper investigates the deployment and reconfigurability of modular linkage structures with a pin and a sliding support, the latter connected to a linear motion actuator. An appropriate control sequence consists of stepwise reconfigurations that involve the selective releasing of one intermediate joint in each closed-loop linkage, effectively reducing it to a 1-DOF "effective crank-slider" mechanism. This approach enables low self-weight and reduced energy consumption. A kinematics and finite-element analysis of different linkage systems, in all intermediate reconfiguration steps of a sequence, have been conducted for different lengths and geometrical characteristics of the members, as well as different actuation methods, i.e., direct and cable-driven actuation. The study provides insight into the impact of various structural typological and geometrical factors on the systems' behavior.

Real-time Characteristic Analysis of A Micro Kernel for Supporting Reconfigurability (재구성된 마이크로 커널의 실시간 특성 분석)

  • 박종현;임강빈;정기현;최경희
    • Proceedings of the IEEK Conference
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    • 2000.06c
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    • pp.121-124
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    • 2000
  • Goal of this Paper is to design and develop core kernel components f3r single processor real-time system, which include real-time schedulers, synchronization mechanism, IPC, message passing, and clock & timer. The goal also contains the basic researches on dynamic load balancing and scheduling which provide mechanism for the distributed information processing and efficient resource sharing among various information appliances based on network.

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Efficient Fault-Recovery Technique for CGRA-based Multi-Core Architecture

  • Kim, Yoonjin;Sohn, Seungyeon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.2
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    • pp.307-311
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    • 2015
  • In this paper, we propose an efficient fault-recovery technique for CGRA (Coarse-Grained Reconfigurable Architecture) based multi-core architecture. The proposed technique is intra/inter-CGRA co-reconfiguration technique based on a ring-based sharing fabric (RSF) and it enables exploiting the inherent redundancy and reconfigurability of the multi-CGRA for fault-recovery. Experimental results show that the proposed approaches achieve up to 73% fault recoverability when compared with completely connected fabric (CCF).

Design of Reconfigurable Frequency Selective Surface Using Patch Array and Grid Structure (패치 배열과 그리드 구조를 이용한 재구성 주파수 선택 구조 설계)

  • Lee, In-Gon;Hong, Ic-Pyo;Seo, Yun-Seok;Chun, Heoung-Jae;Park, Yong-Bae;Cho, Chang-Min
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.25 no.1
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    • pp.92-98
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    • 2014
  • In this paper, the reconfigurable frequency selective surface for C-band was designed using patch array and grid structure. Frequency reconfigurability was obtained by varying the capacitance from varactor diode. From the optimized design parameters, we fabricated the reconfigurable frequency selective surface using the FPCB(Flexible Printed Circuit Board) and commercial varactor diode and measured the frequency reconfigurability for different bias voltage. From the measurement results, proposed structure has the wideband operating frequency of 6.6~7.6 GHz. We can applied this proposed structure to the smooth curved surface like as radome of aircraft or warship.

Reconfigurable Integrated Flash Memory Software Architecture with FAT Compatibility (재구성 가능한 FAT 호환 통합 플래시 메모리 소프트웨어 구조)

  • Kim, Yu-Mi;Choi, Yong-Suk;Baek, Seung-Jae;Choi, Jong-Moo
    • Journal of KIISE:Computing Practices and Letters
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    • v.16 no.1
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    • pp.17-22
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    • 2010
  • As deployments of Flash memory are spreading out rapidly from tiny USB storages to large DB servers, interoperability become an indispensable requirement for Flash memory software architecture. For the purpose, many systems make use of the conventional FAT file system and FTL (Flash Translation Layer) software as a de facto standard. However, the tactless combination of the FAT file system and FTL does not satisfy diverse other requirements of a variety of systems. In this paper, we propose a novel reconfigurable integrated Flash memory software architecture, named INFLAWARE (INtegrated FLAsh softWARE) that supports not only interoperability but also reconfigurability and performance enhancement. Real implementation based experimental results have shown that INFLAWARE can achieve improvements of memory footprint up to 27% with an average of 19%, compared with the conventional FAT and FTL combination. Also, by using map_destroy technique, it can reduce response times of various applications up to 21% with an average of 10%.

Automatic Composition of Layered Architecture using XSLT Scripts (XSLT 스크립트를 이용한 계층 구조 조립 자동화)

  • 정주미;장정아;최승훈
    • Proceedings of the Korean Information Science Society Conference
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    • 2004.10b
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    • pp.433-435
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    • 2004
  • 소프트웨어 프로덕트 라인은 핵심 소프트웨어 자산의 개발을 위한 도메인 공학과 실제 소프트웨어 부품을 조립하여 구체적인 소프트웨어 시스템을 개발하는 응용 공학을 포함한다. 소프트웨어 프로덕트 라인 구축 시 가장 중요한 점은 특정 도메인에 존재하는 가변성(variability)을 지원할 수 있어야 한다는 것으로, 재사용자의 목적에 따라 효율적으로 소프트웨어를 맞춤 생산할 수 있는 컴포넌트 재구성성(reconfigurability)이 핵심 요소라 할 수 있다. 본 논문에서는 재사용자가 선택한 특성 구성을 바탕으로 계층 구조 조립 자동화를 통해 컴포넌트 코드를 자동 생성하는 도구를 구현하였다. 이를 위하여, 컴포넌트 패밀리의 특성 모델에서 표현되는 차이점에 따라 계층 구조의 각 컴포넌트들이 조립되도록 XSLT 스크립트를 사용하였다. 특성 모델과 XML/XSLT 기술을 이용하여 컴포넌트 코드 생성 시에 재구성성을 지원하고 재사용자의 요구에 맞는 컴포넌트 소스 코드를 자동 생성함으로써 소프트웨어 프로덕트 라인 개발 생산성을 향상시킨다.

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Hardware Co-Simulation of an Adaptive Field Oriented Control of Induction Motor

  • Kabache, Nadir;Moulahoum, Samir;Houassine, Hamza
    • Journal of international Conference on Electrical Machines and Systems
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    • v.3 no.2
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    • pp.110-115
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    • 2014
  • The reconfigurability of FPGA devices allows designers to evaluate, test and validate a new control algorithm; a new component or prototypes without damaged the real system with the so-called hardware co-simulation. The present paper uses the Xilinx System Generator (XSG) environment to establish and validate a new nonlinear estimator for the rotor time constant inverse that will be exploited to improve the indirect rotor field control of induction motor.

Simulation on Performance of Constructive Module for Neural Network Processor (신경회로망 연산기의 구조 결정 모듈 성능에 관한 시뮬레이션)

  • Yu, In-Kap;Jung, Je-Kyo;Wee, Jae-Woo;Dong, Sung-Soo;Lee, Chong-Ho
    • Proceedings of the KIEE Conference
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    • 2004.11c
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    • pp.101-103
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    • 2004
  • Expansible & Reconfigurable Neuro Informatics Engine(ERNIE) is effective in reconfigurability and extensibility. But ERNIE have the problem which have limited performance in initial network. To solve this problem, the constructive module using the reconfigurable ERNIE is implemented in simulation model. In this paper, simulation results on sonar data are showed that ERNIE using the constructive module obtains the better performance compared to ERNIE without it.

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