• Proceedings of the Acoustical Society of Korea Conference
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• spring
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• pp.24-27
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• 1999

IMBE(Improved Multi-Band Excitation) vocoders exhibit good performance at low data rates. The major drawback to IMBE coders is their large computational requirements. In this paper, thus, we propose a new pitch search method that preserves the quality of the IMBE vocoder with reduced complexity. The basic idea is to skip unnecessary range of the pitch searching by using the quantization error. Applying the proposed method to the IMBE vocoder, we can get approximately $45.88\%$ processing time reduction and there is no difference in voice quality between conventional IMBE and proposed IMBE.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.12C
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• pp.1182-1191
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• 2003

In this paper, we propose a new hardware architecture for integer transform, quantizer, inverse quantizer, and inverse integer transform of a new video coding standard H.264/JVT. We describe the algorithm and derive hardware architecture emphasizing the importance of area for low cost and low power consumption. The proposed architecture has been verified by PCI-interfaced emulation board using APEX-II Alters FPGA and also by ASIC synthesis using Samsung 0.18 um CMOS cell library. The ASIC synthesis result shows that the proposed hardware can operate at 100 MHz, processing more than 1,300 QCIF video frames per second. The hardware is going to be used as a core module when implementing a complete H.264 video encoder/decoder ASIC for real-time multimedia application.

• Journal of the Institute of Convergence Signal Processing
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• v.2 no.3
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• pp.50-56
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• 2001

As the fuzzy control is applied to servo system, the hardware implementation of the fuzzy information systems requires the high speed operations, short real time control and the small size systems. The aims of this study is to develop hardware of the fuzzy information systems to be apply to servo system. In this paper, we propose a calculation method of approximate reasoning for fuzzy control based on $\alpha$ -level set decomposition of fuzzy sets by quantize $\alpha$ -cuts. This method can be easily implemented with analog hardware. The influence of quantization Bevels of $\alpha$-cuts on output from fuzzy inference engine is investigated. It is concluded that 4 quantization levels give sufficient result for fuzzy control performance of dc servo system. The hardware implementation of proposed operation method and of the defuzzification by gravity center method which is directly converted to PWM actuating signal is also presented. It is verified useful with experiment for dc servo system.

• The Journal of the Acoustical Society of Korea
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• v.30 no.5
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• pp.265-272
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• 2011

In most of the ISF (or LSF) based real time speech codec, SVQ (split vector quantization) method is used to decrease the quantizer complexity and memory size of codebook. However, it produces drawback that the level of correlation between code vectors can not be used during vector splits. This paper presents a new method of adaptive ISF vector quantization, which compensates the drawbacks of SVQ structured quantizer for wideband speech codec. In each different frame, the proposed method makes use of the correlation between splitted vectors by adaptively changing codebook distribution according to ordering property of ISF. The algorithm is evaluated in AMR-WB, and shows about 1.5 bit per frame improvement.

• International Journal of Automotive Technology
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• v.6 no.2
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• pp.107-117
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• 2005

A distributed hardware-in-the-loop simulation (HILS) platform is developed for designing an automotive engine control system. The HILS equipment consists of a widely used PC and commercial-off-the-shelf (COTS) I/O boards instead of a powerful computing system and custom-made I/O boards. The distributed structure of the HILS system supplements the lack of computing power. These features make the HILS equipment more cost-effective and flexible. The HILS uses an automatic code generation extension, REAL-TIME WORKSHOP$^{ (RTW$^{) of MATLAB$^{ tool-chain and RT-LAB$^{, which enables distributed simulation as well as the detection and generation of digital event between simulation time steps. The mean value engine model, which is used in control design phase, is imported into this HILS. The engine model is supplemented with some I/O subsystems and I/O boards to interface actual input and output signals in real-time. The I/O subsystems are designed to imitate real sensor signals with high fidelity as well as to convert the raw data of the I/O boards to the appropriate forms for proper interfaces. A lot of attention is paid to the generation of a precise crank/ earn signal which has the problem of quantization in a conventional fixed time step simulation. The detection of injection! command signal which occurs between simulation time steps are also successfully compensated. In order to prove the feasibility of the proposed environment, a simple PI controller for an air-to-fuel ratio (AFR) control is used. The proposed HILS environment and I/O systems are shown to be an efficient tool to develop various control functions and to validate the software and hardware of the engine control system.

• Journal of the Korean Institute of Intelligent Systems
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• v.14 no.2
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• pp.201-206
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• 2004

This study attempted to develop a speech recognition module applied to a wheelchair for the physically handicapped. In the proposed speech recognition module, TMS320C32 was used as a main processor and Mel-Cepstrum 12 Order was applied to the pro-processor step to increase the recognition rate in a noisy environment. DTW (Dynamic Time Warping) was used and proven to be excellent output for the speaker-dependent recognition part. In order to utilize this algorithm more effectively, the reference data was compressed to 1/12 using vector quantization so as to decrease memory. In this paper, the necessary diverse technology (End-point detection, DMA processing, etc.) was managed so as to utilize the speech recognition system in real time

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.201-208
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• 2012

In this paper, the hardware design of rate control for real-time video encoded is proposed. In the proposed method, a quadratic rate distortion model with high-computational complexity is not used when quantization parameter values are being decided. Instead, for low-computational complexity, average complexity weight values of frames are used to calculate QP. For high speed and low computational prediction, the MAD is predicted based on the coded basic unit, using spacial and temporal correlation in sequences. The rate control is designed with the hardware for fast QP decision. In the proposed method, a quadratic rate distortion model with high-computational complexity is not used when quantization parameter values are being decided. Instead, for low-computational complexity, average complexity weight values of frames are used to calculate QP. In addition, the rate control is designed with the hardware for fast QP decision. The execution cycle and gate count of the proposed architecture were reduced about 65% and 85% respectively compared with those of previous architecture. The proposed RC was implemented using Verilog HDL and synthesized with UMC $0.18{\mu}m$ standard cell library. The synthesis result shows that the gate count of the architecture is about 19.1k with 108MHz clock frequency.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 1996.06a
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• pp.223-227
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• 1996

In this paper we propose an adaptive fast image restoration filter, which is suitable for reducing the blocking artifacts in the compressed image in real-time. The proposed restoration filter is based on the observation that quantization operation in a series of coding process is a nonlinear and many-to-one mapping operator. And then we propose an approximated version of constrained optimization technique as a restoration process for removing the nonlinear and space varying degradation operator. We also propose a novel block classification method for adaptively choosing the direction of a highpass filter, which serves as a constraint in the optimization process. The proposed classification method adopts the bias-corrected maximized likelihood, which is used to determine the number of regions in the image for the unsupervised segmentation. The proposed restoration filter can be realized either in the discrete Fourier transform domain or in the spatial domain in the form of a truncated finite impulse response (FIR) filter structure for real-time processing. In order to demonstrate the validity of the proposed restoration filter experimental results will be shown.

• Proceedings of the KOSOMBE Conference
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• v.1998 no.11
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• pp.299-300
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• 1998

Recently the development of medical modality like as MRI, 3D US, DR etc is very active. Therefore it is more required not only the enhancement of quality in medical service but the improvement of medical system based on quantization, minimization, and optimization of high speed. Especially, as the changing into the digital modality system, it gets to start using ASIC(Application Specific Integrated Circuit) to realize one board system. It requires the implementation of hardware debugging and effective speedy algorithm with more speed and accuracy in order to support and replace existing device. If objected image could be linked to high speed process board with special interface and pre-processed using FPGA, it can be used in real time image processing and protocol of HIS(Hospital Information System). This study can support the basic circuit design of medical image board which is able to realize image processing basically using digitalized medical image, and to interface between existing device and image board containing image processing algorithm.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1447-1453
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• 2014

This paper proposes the new method based on the availability of three points measurement and convexity of photovoltaic (PV) curve characteristic at the maximum power point (MPP). In general, the MPP tracking (MPPT) function is the important part of all PV systems due to their power-voltage (P-V) characteristics related with weather conditions. Then, the analog-to-digital converter (ADC) and low pass filter (LPF) are required to measure the voltage and current for MPPT by the digital controller, which is used to implement the PV power conditioning system (PCS). The measurement and quantization error due to rounding or truncation in ADC and the delay of LPF might degrade the reliability of MPPT. To overcome this limitation, the proposed method is proposed while improving the performances in both steady-state and dynamic responses based on the detailed investigation of its properties for availability and convexity. The performances of proposed method are evaluated with the several case studies by the PSCAD/EMTDC$^{(R)}$ simulation. Then, the experimental results are given to verify its feasibility in real-time.