• Journal of the Korean Solar Energy Society
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• v.40 no.3
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• pp.1-20
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• 2020

In accordance with the Government's policy, renewable power generation is expanding very largely. This leads to increasing uncertainty in the power market and power system owing to the intermittent and fluctuating output characteristics of renewable power generators. Data on the acquisition of renewable power generators can be largely classified according to the operation of the power market and power system. Data on the settlement for the payment for the power amount are acquired in the power market, and real-time data for monitoring the status and output of the generators are acquired in the power system. However, renewable power generators operating in the power market have different acquisition cycles depending on the method of communication of the power meter. They acquire data only for settlement purposes and have no real-time data, which requires improvement. In this paper, the acquisition status is reviewed by classifying the data of renewable power generators into settlement and real-time data. In addition, measures and acquisition criteria for real-time data of renewable power generators for improving the acquisition method are proposed.

• Journal of Biomedical Engineering Research
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• v.9 no.1
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• pp.79-86
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• 1988

This paper describes the design of a hardware systenl for ECG feature extraction based on pipeline processor consistinsf of three microcomputers. ECG data is acquisited by 12 bit A/D converter with hardware QRS triggered detector. Four diagnostic parameters parameters-heart rate, morPhology, axis, and 57 segment-are used for the classification and the diagnosis of arrhythmia. The functions of the main CPU were distributed and processed with three microcomputers. Therefore the effective data process and the real time process using microcomputer can be obtained. The interconnection structure consisting of two common memory units is designed to decrease the delay time caused by data transfer between processors and designed by which the delay time can be taken Loye of one clock period.

• Proceedings of the KIEE Conference
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• 2000.11a
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• pp.174-176
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• 2000

In this paper, a high speed distance relay, using a digital signal processor(DSP) is presented. The idea of the protective algorithm is based on the least square method using minimum data window to minimize the relay operating time. A new disign concept for a low-pass filter is proposed. This analog low pass filter has minimum transient response time. The main processor of the relay is TMS320C31. According to a series of real time tests, the proposed protective relay shows reliable and fast operating characteristics.

• Proceedings of the Korean Information Science Society Conference
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• 2005.07a
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• pp.820-822
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• 2005

The current paper is on a study of the performance estimation fer data processing time and CPU utilization to efficiently develop the real-time system. The analytical modeling and OPNET modeling and benchmarking tests are applied to perform the estimation for data processing time and CPU utilization in real-time system. We demonstrate that the estimation results can be predicted fairly and accurately through the benchmarking test results although there is a small variance between the estimation results and the benchmarking test results.

• The Journal of the Acoustical Society of Korea
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• v.29 no.3
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• pp.191-199
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• 2010

Physical modeling is a synthesis method of high quality sound which is similar to real sound for musical instruments. However, since physical modeling requires a lot of parameters to synthesize sound of a musical instrument, it prevents real-time processing for the musical instrument which supports a large number of sounds simultaneously. To solve this problem, this paper proposes a single instruction multiple data (SIMD) parallel processor that supports real-time processing of sound synthesis of guitar, a representative plucked string musical instrument. To control six strings of guitar, we used a SIMD parallel processor which consists of six processing elements (PEs). Each PE supports modeling of the corresponding string. The proposed SIMD processor can generate synthesized sounds of six strings simultaneously when a parallel synthesis algorithm receives excitation signals and parameters of each string as an input. Experimental results using a sampling rate 44.1 kHz and 16 bits quantization indicate that synthesis sounds using the proposed parallel processor were very similar to original sound. In addition, the proposed parallel processor outperforms commercial TI's TMS320C6416 in terms of execution time (8.9x better) and energy efficiency (39.8x better).

• The Journal of the Acoustical Society of Korea
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• v.16 no.2
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• pp.80-88
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• 1997

In this paper, the implementation of audio/data processor using ETRI DSP to support analog mode in digital/analog dual mode mobile phone is presented. Audio/data processor performs the wideband data processing, audio signal processing, demodulation function, and data rate conversion when it is operated in analog mode. These functions are programmed in assembly language, and then loaded to ETRI DSP together with vocoder program for the digital mode operation. This is a very efficient implementation of the dual mode cellular phone ASIC since the vocoder for the digital mode and audio/data processor for the analog mode are programmed together in the same hardware.

• Journal of the Korea Convergence Society
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• v.7 no.1
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• pp.9-15
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• 2016

In this paper, we describe the design of a high speed data acquisition system(DAS) with STM32 processor based on Cortex-M4. The system is used for the sensor devices to collect raw data on production lines at factory and send them to the servo computer in real time. The system is designed for multi functions with universal asynchronous receiver and transmitter(UART), analog to digital converter(ADC), digital to analog converter(DAC), and general purpose input output(GPIO). those are well tested for various data acquisition and high speed motor control in real time.

• Korean Journal of Remote Sensing
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• v.21 no.5
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• pp.371-382
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• 2005

We present a processing system for the Atmospheric Infrared Sounder (AIRS) sounding suite onboard Aqua satellite. With its unprecedented 2378 channels in IR bands, AIRS aims at achieving the sounding accuracy of radiosonde (1 K in 1-km layer for temperature and $10\%$ in 2-km layer for humidity). The core of the processor is the International MODIS/AIRS Processing Package (IMAPP) that performs the geometric and radiometric correction for generation of Level 1 brightness temperature and Level 2 geophysical parameters retrieval. The processor can produce automatically from received raw data to Level 2 geophysical parameters. As we process the direct-broadcast data almost for the first time among the AIRS direct-broadcast community, a special attention is paid to understand and verify the Level 2 products. This processor includes sub-systems, that is, the near real time validation system which made the comparison results with in-situ measurement data, and standard digital information system which carry out the data format conversion into GRIdded Binary II (GRIB II) standard format to promote active data communication between meteorological societies. This processing system is planned to encourage the application of geophysical parameters observed by AIRS to research the aqua cycle in the Korean peninsula.

• Journal of the Institute of Convergence Signal Processing
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• v.12 no.4
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• pp.315-321
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• 2011

The CRT monitor display system for SONAR signal that are commonly used in ships or naval vessels uses vector scanning method. Therefore the processing circuits of the system is complex. Also because production had been shut down, the supply of parts is difficult as well as high-cost. FPGA -based embedded processor system is flexible to adapting to various applications because it makes simple processing circuits and its core is easily reconfigurable, and provides high speed performance in low-cost. In this paper, we describe an implementation of SONAR signal LCD display system using the FPGA embedded processor system to overcome some weakness of existing CRT system. By changing X-Y Deflection and CRT control blocks of current system into FPGA embedded processor system, our system provides the simplicity, flexibility and low-cost of system configuration, and also real-time acquisition and display of SONAR signal.

• IEMEK Journal of Embedded Systems and Applications
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• v.16 no.6
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• pp.253-258
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• 2021

In this paper, we developed a hardware and software platform of the real-time data logging system to verify radar FEM (Front-end Module) and signal-processing algorithms. We developed a hardware platform based on FPGA (Field Programmable Gate Array) and DSP (Digital Signal Processor) and implemented firmware software to verify the various FEMs. Moreover, we designed PC based software platform to control radar logging parameters and save radar data. The developed platform was verified using 24 GHz multiple channel FMCW (Frequency Modulated Continuous Wave) in an environment of stationary and moving targets of chamber room.