• KSII Transactions on Internet and Information Systems (TIIS)
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• v.16 no.8
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• pp.2816-2830
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• 2022

Number Theoretic Transform (NTT) is a method to design efficient multiplier for large integer multiplication, which is widely used in cryptography and scientific computation. On top of that, it has also received wide attention from the research community to design efficient hardware architecture for large size RSA, fully homomorphic encryption, and lattice-based cryptography. Existing NTT hardware architecture reported in the literature are mainly designed based on radix-2 NTT, due to its small area consumption. However, NTT with larger radix (e.g., radix-4) may achieve faster speed performance in the expense of larger hardware resources. In this paper, we present the performance evaluation on NTT architecture in terms of hardware resource consumption and the latency, based on the proposed radix-2 and radix-4 technique. Our experimental results show that the 16-point radix-4 architecture is 2× faster than radix-2 architecture in expense of approximately 4× additional hardware. The proposed architecture can be extended to support the large integer multiplication in cryptography applications (e.g., RSA). The experimental results show that the proposed 3072-bit multiplier outperformed the best 3k-multiplier from Chen et al. [16] by 3.06%, but it also costs about 40% more LUTs and 77.8% more DSPs resources.

• Journal of IKEEE
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• v.23 no.2
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• pp.438-447
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• 2019

As the IoT-based hyper-connected society grows, public-key cryptosystem such as RSA is frequently used for encryption, authentication, and digital signature. Public-key cryptosystem use very large (safe) prime numbers to ensure security against malicious attacks. Even though the performance of the device has greatly improved, the generation of a large (safe)prime is time-consuming or memory-intensive. In this paper, we propose ET-MR and ET-MR-MR using Euler sieve so it runs faster while using less memory. We present a running time prediction model by probabilistic analysis and compare time and memory of our method with conventional methods. Experimental results show that the difference between the expected running time and the measured running time is less than 4%. In addition, the fastest running time of ET-MR is 36% faster than that of TD-MR, 8.5% faster than that of DT-MR and the fastest running time of ET-MR-MR is 65.3% faster than that of TD-MR-MR and similar to that of DT-MR-MR. When k=12,381, the memory usage of ET-MR is 2.7 times more than that of DT-MR but 98.5% less than that of TD-MR and when k=65,536, the memory usage of ET-MR-MR is 98.48% less than that of TD-MR-MR and 92.8% less than that of DT-MR-MR.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.1
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• pp.261-269
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• 2014

There are many researches on fast exponentiation algorithm which is used to implement a public key cryptosystem such as RSA. On the other hand, the malicious attacker has tried various side-channel attacks to extract the secret key. In these attacks, an attacker uses the power consumption or electromagnetic radiation of cryptographic devices which is measured during computation of exponentiation algorithm. In this paper, we propose a novel simple power analysis attack on m-ary exponentiation implementation. The core idea of our attack on m-ary exponentiation with pre-computation process is that an attacker controls the input message to identify the power consumption patterns which are related with secret key. Furthermore, we implement the m-ary exponentiation on evaluation board and apply our simple power analysis attack to it. As a result, we verify that the secret key can be revealed in experimental environment.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.10C
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• pp.614-620
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• 2011

RSA, the most commonly used public-key cryptosystem, is based on the difficulty of factoring very large integers. The fastest known factoring algorithm is the Number Field Sieve(NFS). NFS first chooses two polynomials having common root modulo N and consists of the following four major steps; 1. Polynomial Selection 2. Sieving 3. Matrix 4. Square Root, of which the most time consuming step is the Sieving step. However, in recent years, the importance of the Polynomial Selection step has been studied widely, because one can save a lot of time and memory in sieving and matrix step if one chooses optimal polynomial for NFS. One of the ideal ways of choosing sieving polynomial is to choose two polynomials with same degree. Montgomery proposed the method of selecting two (nonlinear) quadratic sieving polynomials. We proposed two cubic polynomials using 5-term geometric progression.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.11
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• pp.878-883
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• 2020

Cryptographic algorithms are used to prevent the illegal manipulation of data. They are divided into public-key cryptosystems and symmetric-key cryptosystems. Public-key cryptosystems require considerable time for encryption and decryption compared to symmetric-key cryptosystem. On the other hand, key management, and delivery are easier for public-key cryptosystems than symmetric-key cryptosystems because different keys are used for encryption and decryption. Furthermore, hash functions are being used very effectively to verify the integrity of the digital content, as they always generate output with a fixed size using the data of various sizes as input. This paper proposes a method using RSA public-key cryptography and a hash function to determine if a digital image is deformed or not and to detect the manipulated location. In the proposed method, the entire image is divided into several blocks, 64×64 in size. The watermark is then allocated to each block to verify the deformation of the data. When deformation occurs, the manipulated pixel will be divided into smaller 4×4 sub-blocks, and each block will have a watermark to detect the location. The safety of the proposed method depends on the security of the cryptographic algorithm and the hash function.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 1995.11a
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• pp.151-162
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• 1995

보다 짧은 길이의 덧셈/뺄셈 사슬($addition_{traction-chain}$)을 찾는 문제는 정수론을 기반으로 하는 많은 암호시스템들에 있어서 중요한 문제이다. 특히, RSA에서의 모듈라멱승(modular exponentiation)이나 타원 곡선(elliptic curve)에서의 곱셈 연산시간은 덧셈사슬(addition-chain) 또는 덧셈/뺄셈 사슬의 길이와 정비례한다 본 논문에서는 덧셈/뻘셈 사슬을 구하는 새로운 알고리즘을 제안하고, 그 성능을 분석하여 기존의 방법들과 비교한다. 본 논문에서 제안하는 알고리즘은 작은윈도우(small-window) 기법을 기반으로 하고, 뺄셈을사용해서 윈도우의 개수를 최적화함으로써 덧셈/뺄셈 사슬의 길이를 짧게 한다. 본 논문에서 제안하는 알고리즘은 512비트의 정수에 대해 평균길이 595.6의 덧셈/뺄셈 사슬을 찾는다.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 1995.11a
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• pp.163-172
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• 1995

In this paper, the bit-level 1-dimensionl systolic array for modular multiplication are designed. First of all, the parallel algorithms and data dependence graphs from Walter's Iwamura's methods based on Montgomery Algorithm for modular multiplication are derived and compared. Since Walter's method has the smaller computational index points in data dependence graph than Iwamura's, it is selected as the base algorithm. By the systematic procedure for systolic array design, four 1-dimensional systolic arrays ale obtained and then are evaluated by various criteria. Modifying the array derived from 〔0,1〕 projection direction by adding a control logic and serializing the communication paths of data A, optimal 1-dimensional systolic array is designed. It has constant I/O channels for modular expandable and is good for fault tolerance due to unidirectional paths. And so, it is suitable for RSA Cryptosystem which deals with the large size and many consecutive message blocks.

• Proceedings of the Korea Information Processing Society Conference
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• 2003.05c
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• pp.1913-1916
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• 2003

전자상거래 일반적인 구조인 SET(Secure Electronic Transaction)프로토콜은 비밀키 알고리즘의 DES(Data Encryption Standard), 공개키 알고리즘의 RSA(Rivest, Shamir, Adleman), 메시지 다이제스트의 SHA-1를 사용하고 있다. 본 논문에서는 비밀키 알고리즘의 DES를 이용하여 수신측에 전송하는 과정을 3BC알고리즘으로 대체함으로서 생략하였고, 공개키 알고리즘의 요소를 ECC(Elliptic Curve Cryptosystem)알고리즘을 사용하였다. 또한 전자서명을 위한 방법은 Double Signature를 사용하여 SET프로토콜에서 DES의 전송을 위한 전자봉투를 삭제한 결과 수행시간의 단축과 보안의 강도를 강화시켰다.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.9
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• pp.62-69
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• 1996

In this paper, the bit-level 1-dimensional systolic array for modular multiplication is designed. First of all, the parallel algorithm and data dependence graph from walter's method based on montgomery algorithm suitable for array design for modular multiplication is derived. By the systematic procedure for systolic array design, four 1-dimensional systolic arrays are obtained and then are evaluated by various criteria. As it is modified the array which is derived form [0,1] projection direction by adding a control logic and it is serialized the communication paths of data A, optimal 1-dimensional systolic array is designed. It has constant I/O channels for expansile module and it is easy for fault tolerance due to unidirectional paths. It is suitable for RSA cryptosystem which deals iwth the large size and many consecutive message blocks.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.10 no.4
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• pp.73-79
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• 2000

We show how to reduce the number of multiplications required for an exponentiation by using a window method and a factor method. This method requires 599 multiplications for a 512-bit integer exponent while the window method with window size 5 requires 607 multiplications. This method requires fewest multiplications among practical exponentiation algo- rithms.