• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.41 no.3
• /
• pp.29-38
• /
• 2004

In this paper, we present an efficient architecture of a versatile Reed-Solomon (RS) decoder which can be programmed to decode RS codes continuously with my message length k as well as any block length n. This unique feature eliminates the need of inserting zeros for decoding shortened RS codes. Also, the values of the parameters n and k, hence the error-correcting capability t can be altered at every codeword block. The decoder permits 3-step pipelined processing based on the modified Euclid's algorithm (MEA). Since each step can be driven by a separate clock, the decoder can operate just as 2-step pipeline processing by employing the faster clock in step 2 and/or step 3. Also, the decoder can be used even in the case that the input clock is different from the output clock. Each step is designed to have a structure suitable for decoding RS codes with varying block length. A new architecture for the MEA is designed for variable values of the t. The operating length of the shift registers in the MEA block is shortened by one, and it can be varied according to the different values of the t. To maintain the throughput rate with less circuitry, the MEA block uses both the recursive technique and the over-clocking technique. The decoder can decodes codeword received not only in a burst mode, but also in a continuous mode. It can be used in a wide range of applications because of its versatility. The adaptive RS decoder over GF(2$^{8}$ ) having the error-correcting capability of upto 10 has been designed in VHDL, and successfully synthesized in an FPGA chip.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.30A no.3
• /
• pp.16-33
• /
• 1993

New decoding algorithm of double-error-correction Reed-Solmon codes over GF(2$^{8}$) for optical compact disks is proposed and decoding algorithm of RS codes with triple-error-correcting capability is presented in this paper. First of all. efficient algorithms for estimating the number of errors in the received code words are presented. The most complex circuits in the RS decoder are parts for soving the error-location numbers from error-location polynomial, so the complexity of those circuits has a great influence on overall decoder complexity. One of the most known algorithm for searching the error-location number is Chien's method, in which all the elements of GF(2$^{m}$) are substituted into the error-location polynomial and the error-location number can be found as the elements satisfying the error-location polynomial. But Chien's scheme needs another 1 frame delay in the decoder, which reduces decoding speed as well as require more stroage circuits for the received ocode symbols. The ther is Polkinghorn method, in which the roots can be resolved directly by solving the error-location polynomial. Bur this method needs additional ROM (readonly memory) for storing tthe roots of the all possible coefficients of error-location polynomial or much more complex cicuit. Simple, efficient, and high speed method for solving the error-location number and decoding algorithm of double-error correction RS codes which reudce considerably the complexity of decoder are proposed by using Hilbert theorems in this paper. And the performance of the proposed decoding algorithm is compared with that of conventional decoding algorithms. As a result of comparison, the proposed decoding algorithm is superior to the conventional decoding algorithm with respect to decoding delay and decoder complexity. And decoding algorithm of RS codes with triple-error-correcting capability is presented, which is suitable for error-correction in digital audio tape, also.

• Journal of Advanced Marine Engineering and Technology
• /
• v.33 no.5
• /
• pp.738-745
• /
• 2009

Underwater acoustic communication has multipath error because of reflection by sea-level and sea-bottom. The multipath of underwater channel causes receive signal to make error floor. In this paper, we propose the underwater communication system using various channel coding schemes such as RS coding, convolutional code, turbo code and concatenated code for overcoming the multipath effect in underwater channel. As shown in simulation results, characteristic of multipath error is similar to that of random error. So interleaver has not effect on error correcting. For correcting of error floor by multipath, it is necessary to use strong channel codes like turbo code. Turbo code is one of the iterative codes. And the performance of concatenated codes including RS code has better performance than using singular channel codes.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.49 no.1
• /
• pp.25-34
• /
• 2012

This paper presents a universal architecture for variable-length eight-parallel Reed-Solomon (RS) decoder for high-rate WPAN systems. The proposed architecture can support not only RS(255,239) code but various shortened RS codes. Moreover, variable-length architecture provides variable low latency for various shortened RS codes and the eight-parallel design also provides high data processing rate. Using 90-$nm$ CMOS standard cell technology, the proposed RS decoder has been synthesized and measured for performance. The proposed RS decoder can provide a maximum 19-$Gbps$ data rate at clock frequency 300 $MHz$.

• Journal of Communications and Networks
• /
• v.5 no.3
• /
• pp.187-196
• /
• 2003

We consider the use of error control coding in direct sequence-code-division multiple access (OS-COMA) systems that employ multiuser detection (MUO) and space diversity. The relative performance gain between Reed-Solomon (RS) code and convolutional code (CC) is well known in [1] for the single user, additive white Gaussian noise (AWGN) channel. In this case, RS codes outperform CC's at high signal-to-noise ratios. We find that this is not the case for the multiuser interference channel mentioned above. For useful error rates, we find that soft-decision CC's to be uniformly better than RS codes when used with DS-COMA modulation in multiuser space-time channels. In our development, we use the Gaussian approximation on the interference to determine performance error bounds for systems with low number of users. Then, we check their accuracy in error rate estimation via system's simulation. These performance bounds will in turn allow us to consider a large number of users where we can estimate the gain in user-capacity due to channel coding. Lastly, the use of turbo codes is considered where it is shown that they offer a coding gain of 2.5 dB relative to soft-decision CC.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.50 no.3
• /
• pp.59-67
• /
• 2013

Reed-Solomon (RS) codes are powerful error-correcting codes used in diverse applications. Recently, algebraic soft-decision decoding algorithm for RS codes that can correct the errors beyond the error correcting bound has been proposed. The algorithm requires very intensive computations for interpolation, therefore an efficient VLSI architecture, which is realizable in hardware with a moderate hardware complexity, is mandatory for various applications. In this paper, we propose an efficient architecture with low hardware complexity for interpolation in soft-decision list decoding of Reed-Solomon codes. The proposed architecture processes the candidate polynomial in such a way that the terms of X degrees are processed in serial and the terms of Y degrees are processed in parallel. The processing order of candidate polynomials adaptively changes to increase the efficiency of memory access for coefficients; this minimizes the internal registers and the number of memory accesses and simplifies the memory structure by combining and storing data in memory. Also, the proposed architecture shows high hardware efficiency, since each module is balanced in terms of latency and the modules are maximally overlapped in schedule. The proposed interpolation architecture for the (255, 239) RS list decoder is designed and synthesized using the DongbuHitek $0.18{\mu}m$ standard cell library, the number of gate counts is 25.1K and the maximum operating frequency is 200 MHz.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.1 no.1
• /
• pp.66-78
• /
• 1991

In this paper, this paper, the stream cipher systems and the error propagation are analyzed. During the ciphertext transmission. for the error control of errors occurred in the channel, the DSEC(31, 27) RS codes will be used for bothe internal and external error controls for the self-synchromizing cipher system with ciphertext feedback.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.13 no.1
• /
• pp.69-76
• /
• 2018

This paper studies the Turbo Codes, the concatenation of Turbo Codes and Reed-Solomon (RS) codes on Orthogonal frequency-division multiplexing (OFDM) in digital communication channel, and then analysis the performances of the new concatenated Forward Error Correct (FEC) scheme applied to an OFDM system based on the digital terrestrial video broadcasting (DVB-T) scheme. We compared the results with the standard DVB-T convolutional codes performances on Additive White Gaussian Noise (AWGN) channels. The simulation results shown that by employing turbo codes with only a few numbers of iterations, the performances of the overall system can be improved significantly. These results will be obtained by applying an appropriate interleaver technique in the concatenated FEC procedure.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.44 no.2
• /
• pp.22-28
• /
• 2007

High PAPR (peak-to-average power ratio) is a major drawback of OFDM (orthogonal frequency division multiplexing) signals. In this paper, a modified SLM (selective mapping) technique that uses erasure decoding of RS (Reed-Solomon) codes is presented. At the transmitter a set of phase sequences are multiplied such that some portions of check symbols in RS-coded OFDM data blocks are phase-rotated. At the receiver, RS decoding is performed with the phase-rotated check symbols being treated as erasures. Hence, there is no need to send side information about the phase sequence selected to transmit for the lowest PAPR. In addition, the estimation process for the selected phase sequence is no longer needed at the receiver, leading to improvement in terms of complexity and performance. To evaluate the performance of this technique, the CCDF (complementary cumulative distribution function) of PAPR, the BER (bit error rate) and the decoding failure probability are compared with those of the previous SLM techniques.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.13 no.7
• /
• pp.3583-3598
• /
• 2019

In order to improve the reliability and repair efficiency of distributed storage systems, minimum bandwidth regenerating (MBR) codes based on cyclic variable fractional repetition (VFR) codes are constructed in this thesis, which can repair failed nodes accurately. Specifically, in order to consider the imbalance of data accessed by the users, cyclic VFR codes are constructed according to that data with different heat degrees are copied in different repetition degrees. Moreover, we divide the storage nodes into groups, and construct MBR codes based on cyclic VFR codes to improve the file download speed. Performance analysis and simulation results show that, the repair locality of a single node failure is always 2 when MBR codes based on cyclic VFR codes are adopted in distributed storage systems, which is obviously superior to the traditional MBR codes. Compared with RS codes and simple regenerating codes, the proposed MBR codes based on cyclic VFR codes have lower repair locality, repair complexity and bandwidth overhead, as well as higher repair efficiency. Moreover, relative to FR codes, the MBR codes based on cyclic VFR codes can be applicable to more storage systems.