• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.3B
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• pp.584-591
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• 2000

In distributed arithmetic-based architecture for an inner product between two length-N vectors, the size of the ROM increases exponentially with N. Moreover, the ROMs are generally the bottleneck of speed, especially when their size is large. In this paper, a ROM size reduction technique for DA( distributed arithmetic ) is proposed. The proposed method is based on modified OBC( offset binary coding) and control circuit reduction technique. by simulations, it is shown that the use of the proposed technique can result in reduction in the number of gates up to 50%.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.821-824
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• 1999

In distributed arithmetic-based architecture for an inner product between two length-N vectors, the size of the ROM increases exponentially with N. Moreover, the ROMs are generally the bottleneck of speed, especially when their sire is large. In this paper, a ROM size reduction technique for DA (Distributed Arithmetic) is proposed. The proposed method is based on modified OBC (Offset Binary Coding) and control circuit reduction technique. By simulations, it is shown that the use of the proposed technique can result in reduction in the number of gates up to 50%.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.5
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• pp.354-360
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• 2003

A new ROM compression method for continuous data is proposed. The ROM compression method is based on two proposed ROM compression algorithms. The first one is a region select ROM compression algorithm that stores only regions including data after dividing data into many small regions by magnitude and address. The second is a quantization ROM and error ROM compression algorithm that divides data into quantized data and their errors. Using these algorithms, 40~60% ROM size reductions aye achieved for various continuous data.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.4
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• pp.205-210
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• 2003

A 3-Transistor cell CMOS OTP ROM array using standard CMOS antifuse (AF) based on permanent breakdown of MOSFET gate oxide is proposed, fabricated and characterized. The proposed 3-T OTP cell for ROM array is composed of an nMOS AF, a high voltage (HV) blocking nMOS, and cell access transistor, all compatible with standard CMOS technology. The experimental results show that the proposed structure can be a viable technology option as a high density OTP ROM array for modern digital as well as analog circuits.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.10
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• pp.1179-1182
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• 2016

In this paper, a new method to reduce the size of ROM in the direct digital frequency synthesizer (DDFS) is proposed. This method use the sine-linear phase difference method and differential PCM. The new ROM compression method can reduce the ROM size by using the two ROM. The quantized value of sine-linear phase difference is saved by the ROM1 of the $2^N$ sample period. The ROM2 save the difference between the original sine-linear phase difference value and the saved sample value of the ROM1. The ROM compression ratio of 37% is achieved by this method. Also, the power consumption is decreased according to the ROM size reduction.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.7
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• pp.1718-1731
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• 1998

Digital quadrature demodulator is needed for the coherent demodulation in the digital communication systems such as Binary Phase-Shift-Keying, Quadrature Phase-Shift-Keying, and Quadrature Anmplitude Modulation. Conventaionally, the DDFS (Direct Digital Frequency Synthsizer) is used for generating the carrier signal and seperate multi-pliers are used for mixing. And the DDFS is implemented using the ROM (Read Only Memory), which can be a bottle-neck neck when the fast-speed and small-area implementation is required. A new architecture is developed, which employs the circular rotation mode of the CORDIC algorithm for signal mixing as well as carrier generation. To optimize the hardware design parameters, the finiteword-length effects of the proposed implementation arachitecture are analyzed in comparison with a conventional ROM-based architecture. The hardware costs are also estimated, which showed that the proposed architecture occupies only a third of the area of the conventional ROM-based architecture for the same performance. A full-custom VLSI is developed using the proposed architecture.

• The Journal of Korean society of community based occupational therapy
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• v.2 no.1
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• pp.37-47
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• 2012

Objective : The purpose of this study was to identify Effects of the ROM dance on cognitive function, neuropsychiatric in using wheelchair senior in nursing home. Methods : The subjects of the experimental group were 15 seniors using wheelchair who attended an ROM dance program in a nursing home. It was carried out for 18 weeks from Mar. 2010. to August. 2010. The evaluation tools used for the presented study were the Mini-Mental Status Exam-Korean(MMSE-K) and Neuropsychiatric Inventory-Questionaire (NPI-Q). Results : In the terms of cognitive function there was no significant defference between the mean pre/post test. but the factor(orientation of time) of MMSE-K and the factors 2 (sleep/nighttime behavios, apathy/indefference) of NPI-Q was significant improvement. Conclusion : In this study, the ROM dance program was effective in improving cognitive function and neuropsychiatric in seniors using wheelchair. also ROM dance program was decreasing and regression delay effect in cognitive and neuropsychiatric.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.9
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• pp.536-542
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• 2004

An architecture of direct digital frequency synthesizers (DDFS) is studied in this paper The Direct digital frequency synthesizers (DDFS) provide fast frequency switching with high spectral purity and are widely used in modern spread spectrum wireless communication systems. ROM-based DDFS uses a ROM lookup table to store the amplitude of a sine wave. In this paper, we suggest three new techniques to reduce the ROM size. One new technique uses more number of hierarchical levels in ROM structures. Another techniques use simple interpolation techniques combined with hierarchical ROM structures. A 12 bit sine wave is generated by using these techniques. Experimental results show that the new proposed techniques can reduce the required ROM size by up to 24%, when compared to that of a resent method[1].

• Research in Community and Public Health Nursing
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• v.13 no.4
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• pp.778-785
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• 2002

Purpose: The purpose of this study was to develop a CD-ROM title for the prevention of sexual harassment and violence in middle school students. Method: The process for developing the CD-ROM title consisted of 10 steps proposed by Alessi and Trollip. Results: This CD-ROM title was composed of 4 domains, 11 subjects, and 31 detailed subjects. The 4 domains were: 1) understanding of sexual harassment and violence, 2) cases of sexual harassment and violence, 3) prevention and coping strategies, and 4) sexual knowledge. The subjects included texts, and the detailed subjects included graphics, animations, videos, and pictures. Conclusion: This CD-ROM may reduce the occurrence of sexual harassment and violence and accommodate enriched humanity in middle school students.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.37 no.1
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• pp.9-16
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• 2024

Using the proper orthogonal decomposition (POD) based intrusive reduced order model (ROM), the total degrees of freedom of the structural system can be significantly reduced and the critical time step satisfying the conditional stability increases in the explicit time integrations. In this study, therefore, the changes in the critical time step in the explicit time integrations are investigated using both the POD-ROM and Voronoi-cell lattice model (VCLM). The snapshot matrix is composed of the data from the structural response under the arbitrary dynamic loads such as seismic excitation, from which the POD-ROM is constructed and the predictive capability is validated. The simulated results show that the significant reduction in the computational time can be achieved using the POD-ROM with sufficiently ensuring the numerical accuracy in the seismic analyses. In addition, the validations show that the POD based intrusive ROM is compatible with the Voronoi-cell lattice based explicit dynamic analyses. In the future study, the research results will be utilized as an elemental technology for the developments of the real-time predictive models or monitoring system involving the high-fidelity simulations of structural dynamics.