• Title/Summary/Keyword: RMS voltage

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Proposal of the Energy Recovery Circuit for Testing High-Voltage MLCC (고전압 MLCC 시험을 위한 에너지 회수 회로 제안)

  • Kong, So-Jeong;Kwon, Jae-Hyun;Hong, Dae-Young;Ha, Min-Woo;Lee, Jun-Young
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.3
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    • pp.214-220
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    • 2022
  • This paper proposes a test device designed for developing a high-voltage multilayer ceramic capacitor (MLCC). The proposed topology consists of an energy recovery circuit for charging/discharging capacitor, a flyback converter, and a boost converter for supplying power and a bias voltage application to the energy recovery circuit. The energy recovery circuit designed with a half-bridge converter has auxiliary switches operating before the main switches to prevent excessive current from flowing to the main switches. A prototype has been designed to verify the reliability of target capacitors following the voltage fluctuation with a frequency range below 65 kHz. To conduct high root mean square (RMS) current to the capacitor as a load, the MLCC test was conducted after the topology verification was completed through the film capacitor as a load. Through the agreement between the RMS current formula proposed in this paper and the MLCC test results, the possibility of its use was demonstrated for high-voltage MLCC development in the future.

DSP Control of Three-Phase UPS Inverter with Output Voltage Harmonic Compensator (3상 UPS 인버터의 출력전압 왜형률 개선을 위한 고조파 보상기법의 DSP 제어)

  • 변영복;조기연;박성준;김철우
    • Proceedings of the KIPE Conference
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    • 1997.07a
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    • pp.269-275
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    • 1997
  • This paper presents real time digital signal processor(DSP) control of UPS system feeding processor(DSP) control of UPS system feeding nonlinear loads to provide sinusoidal inverter output voltage. The control scheme is composed of an rms voltage compensator, the load current harmonics feed-forward loop for the cancellation of output voltage harmonics, and the output voltage harmonics feedback loop for system stability. The controller employs a Texas Instruments TMS320C40GFL50 DSP.

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A Single-Phase DC-AC Inverter Using Two Embedded Z-Source Converters (2대의 임베디드 Z-소스 컨버터를 이용한 단상 DC-AC 인버터)

  • Kim, Se-Jin;Jung, Young-Gook;Lim, Young-Cheol;Choi, Joon-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.6
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    • pp.1152-1162
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    • 2011
  • In this paper, a single-phase DC-AC inverter using two embedded Z-source converters is proposed. The proposed inverter is composed of two embedded Z-source converters with common DC source and output AC load. The output AC voltage of the inverter is obtained by the difference of output capacitor voltages of each converter. The output voltage of each converter take shape of the asymmetrical AC waveform centering zero voltage. Therefore, the proposed inverter can generate the same output voltage despite low VA rating L-C elements, compared to the conventional inverter using high DC voltage with AC ripple. To verify the validity of the proposed system, the PSIM simulation was achieved under the condition of rapid increase of DC source (110[V]${\rightarrow}$150[V]) and R-load (50[${\Omega}$]${\rightarrow}$300[${\Omega}$]). For controlling the voltage of the inverter system, the one-cycle controller was adopted. As results, the proposed inverter output the constant AC voltage (220[V]rms/60[Hz]) for all conditions. Also, the R-L load and nonlinear diode load were adopted for the proposed inverter loads, and we could know that the its output voltage characteristics were as good as the pure R-load. Finally, the RMS and THD of output AC voltage were examined for the different loads, input DC voltages and reference voltage signals.

Pulse Width and Pulse Frequency Modulated Soft Commutation Inverter Type AC-DC Power Converter with Lowered Utility 200V AC Grid Side Harmonic Current Components

  • Matsushige T.;Ishitobi M.;Nakaoka M.;Bessyo D.;Yamashita H.;Omori H.;Terai H.
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.484-488
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    • 2001
  • The grid voltage of commercial utility power source hi Japan and USA is 100rms, but in China and European countries, it is 200rms. In recent years, In Japan 200Vrms out putted single phase three wire system begins to be used for high power applications. In 100Vrms utility AC power applications and systems, an active voltage clamped quasi-resonant Inverter circuit topology using IGBTs has been effectively used so far for the consumer microwave oven. In this paper, presented is a half bridge type voltage-clamped high-frequency Inverter type AC-DC converter using which is designed for consumer magnetron drive used as the consumer microwave oven in 200V utility AC power system. This zero voltage soft switching Inverter can use the same power rated switching semiconductor devices and three-winding high frequency transformer as those of the active voltage clamped quasi-resonant Inverter using the IGBTs that has already been used for 100V utility AC power source. The operating performances of the voltage source single ended push pull type Inverter are evaluated and discussed for consumer microwave oven. The harmonic line current components In the utility AC power side of the AC-DC power converter operating at ZVS­PWM strategy reduced and improved on the basis of sine wave like pulse frequency modulation and sine wave like pulse width modulation for the utility AC voltage source.

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A study on the overlap scanning method for the driving efficiency improvement of LC Displays (액정 표시기의 구동효율 개선을 위한 중첩구동방식에 관한 연구)

  • 최선정;김용덕
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.7
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    • pp.110-116
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    • 1994
  • In this paper a Duty Effective Overlap Scanning method (DEOS) for the improvement of driving efficiency of LC displays which have the RMS voltage responding characteristics is proposed and new processing method of data signals for optimum application of this method is also proposed. Proposed method has a few advantages such as the increment of duty ratio the increment of driving power loaded on LC cell and the decrement of RMS voltage error rate caused by signal attenuation on electrodes composing of display when compared with the conventional method which is called as optimum voltage amplitude selection method. And also by adopting new data signal processing method which has 3 kinds of voltage levels additional advantage much improving crosstalk phenomenon which is the most serious problems of simple matrix structured display is obtained. For the characteristic estimation new mathematical representation for new overlap scanning method and data signal processing method are induced and defined. And by the defined formula and simulation the characteristics of the proposed method and the conventional method are compared and analyzed. As a result of estimation this new method being able to optimize the overlap rate of scan signal and using 3 levels of data signals has the characteristic which can improve the driving efficiency of LC displays.

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Numerical Algorithm for Power Transformer Protection

  • Park, Chul-Won;Suh, Hee-Seok;Shin, Myong-Chul
    • KIEE International Transactions on Power Engineering
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    • v.4A no.3
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    • pp.146-151
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    • 2004
  • The most widely used primary protection for the internal fault detection of the power transformer is current ratio differential relaying (CRDR) with harmonic restraint. However, the second harmonic component could be decreased by magnetizing inrush when there have been changes to the material of the iron core or its design methodology. The higher the capacitance of the high voltage status and underground distribution, the more the differential current includes the second harmonic during the occurrence of an internal fault. Therefore, the conventional second harmonic restraint CRDR must be modified. This paper proposes a numerical algorithm for enhanced power transformer protection. This algorithm enables a clear distinction regarding internal faults as well as magnetizing inrush and steady state. It does this by analyzing the RMS fluctuation of terminal voltage, instantaneous value of the differential current, RMS changes, harmonic component analysis of differential current, and analysis of flux-differential slope characteristics. Based on the results of testing with WatATP99 simulation data, the proposed algorithm demonstrated more rapid and reliable performance.

Operating characteristics of high Tc superconducting current limiting fuse at various voltages (고온 초전도 한류퓨즈의 전압별 동작특성)

  • Choi, Hyo-Sang;Hyun, Ok-Bae;Kim, Hye-Rim;Hwang, Si-Dole;Park, Kwon-Bae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.05c
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    • pp.161-163
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    • 2001
  • We present the basic properties of a superconducting current limiting fuse (SCLF) based on YBCO/Au films. The SCLFs consists of YBCO stripes covered with Au layers for current shunt. Under the source voltage of 100 $V_{rms}$, the longer the duration time of fault current was, the shorter its discharge time was. The duration time of fault current and its discharge time were reduced by increased voltages in the range of 200 - 300 $V_{rms}$. We thought that this was because the quench propagation was limited by local melting generated with higher voltage.

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Analysis and Design of a PFC AC-DC Converter with Electrical Isolation

  • Lin, Chia-Ching;Yang, Lung-Sheng;Zheng, Ren-Jun
    • Journal of Power Electronics
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    • v.14 no.5
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    • pp.874-881
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    • 2014
  • This study presents a single-phase power factor correction AC-DC converter that operates in discontinuous conduction mode. This converter uses the pulse-width modulation technique to achieve almost unity power factor and low total harmonic distortion of input current for universal input voltage $90V_{rms}$ to $264V_{rms}$) applications. The converter has a simple structure and electrical isolation. The magnetizing-inductor energy of the transformer can be recycled to the output without an additional third winding. The steady-state analysis of voltage gain and boundary operating conditions are discussed in detail. Finally, experimental results are shown to verify the performance of the proposed converter.

Equivalent 10-Hz Flicker Index Calculation Using Half-cycle Sliding Window and Recursive RMS Method (반주기 슬라이딩 윈도우와 재귀적 실효치 계산을 이용한 국내 플리커 평가지수 산출기법)

  • Cho, Soo-Hwan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.11
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    • pp.2017-2020
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    • 2011
  • Flicker, which is also known as voltage fluctuation, is an electromagnetic phenomenon generated by large scale nonlinear loads, such as arc furnaces and welding machines. Since a severe and continuous flicker can cause to some damages to electrically sensitive loads as well as human's visual irritations, it needs to be appropriately managed by being accurately measured, quantified and assessed. In Korea, an equivalent 10-Hz flicker index, shortly ${\Delta}V10$, is used to determine the permission limit of flicker. This paper presents an efficient calculation of the flicker index by using a half-cycle sliding window and a recursive method, showing a concrete calculating procedure of ${\Delta}V10$ from the viewpoint of signal processing.

Current Limiting and Discharge Characteristics of High Tc Superconductive Fuse (고온 초전도 퓨즈의 한류 및 방전 특성)

  • Choi, Hyo-Sang
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.6
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    • pp.673-677
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    • 2004
  • We present the basic properties of a superconductive fuse (SF) based on YBCO/Au films. The SF consists of YBCO stripes covered with Au layers for current shunt. The fault current was limited to a designed value in less than 0.4 msec by resistance development in YBCO/Au upon quenching. This enabled the SF to transfer small fault power and the suppressed current was sustained for more than 0.5 msec while Au layer melting and arcing. The arcing time was less than 2.5 msec, that is short enough to do self-interruption. Under the source voltage of 100 $V_{rms}$, the longer the duration time of fault current was, the shorter its discharge time was. The duration time of fault current and its discharge time were reduced by increased voltages in the range of 200 - 300 $V_{rms}$. We thought that this was because the quench propagation was limited by local melting generated with higher voltage.age.