• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.4C
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• pp.342-352
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• 2002

In this paper, we compare the performances of RIO and RIO-DC buffer management schemes for DiffServ AF PHB standardized in IETF. For the comparison, we relatively differentiate maximum delay for each Assured Service subclass in Differentiated Services by allocating bandwidth to each subclass differently. In addition, we set the values of RIO and RIO-DC parameters considering the buffer size determined by the network topology and the ratio of bandwidth allocated to each subclass. In this simulation environment, the performances of RIO and RIO-DC schemes are analyzed focusing on the throughput of the In-profile traffic, the link utilization and the fairness. Simulation results show that the performance of RIO-DC scheme is comparable to that of RIO scheme with regard to the throughput of the In-profile traffic and the link utilization. However, under the simulation condition RIO-DC scheme improves the fairness between flows much better than RIO scheme.

• Journal of information and communication convergence engineering
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• v.9 no.5
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• pp.539-544
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• 2011

In this paper, a parameter optimization method of RIO-DC (RED (Random Early Detection) with In and Out-De-Coupled Queues) scheme for Assured Service (AS) in Differentiated Services (DiffServ) is proposed. In order to optimize QoS (Quality of Service) performance of the RIO-DC policy for AS in terms of maximum tolerable latency, link utilization, fairness, etc., we should design router nodes with proper RIO-DC operating parameter values. Therefore, we propose a RIO-DC configuration method and the admission control criterion, considering the allocated bandwidth to each subclass and the corresponding buffer size, to increase throughput for In-profile traffic and link utilization. Simulation results show that RIO-DC with the proposed parameter values guarantees QoS performance comparable with the RIO scheme and it improves fairness between AS flows remarkably.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.2
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• pp.352-359
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• 2008

This paper presents a controller implementation using model based controller design programs-System Identification Toolkit, Control Design Toolkit, Simulation module. This method is easier and simpler than conventional controller design method. To implement speed control system of DC motor, a CompactRIO, Real-Time(RT) cntroller provided by NI(National Instruments), is used as hardware equipment. Firstly transfer function of DC motor drive system, which was a control target plant, can be acquired through System Identification Toolkit by using test input signal applied to motor and output signal from motor. And designing of pole-zero compensator satisfying desired control response performance through Control Design Toolkit, designed speed control response can be tested through Simulation Module. Finally LabVIEW program is converted to real-time program and downloaded to CompactRIO real-time controller Through experimental results to real DC motor drive system, designed speed control response is compared to simulation results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.6B
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• pp.588-603
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• 2003

In this paper, we propose an Aggregate Three Color Marker without per flow management which is required for an Edge router to improve End-to-End QoS of Assured Service in DiffServ. Proposed Aggregate Three Color Marker is used with the Adaptive RIO-DC scheme to achieve the minimum rate guarantee without per flow management. Assuming that the admission control for Assured Service has been performed, proposed Aggregate Three Color Marker measures incoming In-profile traffic rate at the output link of an edge router using a token-bucket with a token rate equal to the sum of contracted rates of admitted flows passing the edge router. If there are token losses from the token bucket, out-of-profile packets are promoted to Yellow packets within the aggregate traffic profile. And yellow packets are demoted to out-of-profile packets at the input link to an Edge router fer the purpose of fairness maintenance. In-profile packets and Yellow packets are processed identically at the RIO-DC buffer management scheme in our proposed method. Simulation results show that through using proposed Aggregate Three Color Marker with the Adaptive RIO-DC scheme, the minimum rate guarantee for Assured Service can be achieved without per flow management at multiple DiffServ domains.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1956-1957
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• 2007

본 논문에서는 모델기반의 제어기 설계 프로그램인 National Instruments(NI)사의 System Identification Toolkit과 Control Design Toolkit, Simulation module을 사용하여 기존의 제어기 설계방식 보다 쉽고 편리하게 제어기를 설계할 수 있었다. 직류전동기의 속도 제어시스템을 구현하기 위해서 하드웨어는 NI사에서 제공하는 실시간 제어기(Real-Time Controller:RT) CompactRIO를 사용하였다. 먼저는, 테스트 입력 신호를 전동기에 인가하고 얻은 출력신호를 통해 제어대상 플랜트인 직류전동기 구동시스템의 전달함수를 구할 수 있었다. 다음으로는 원하는 제어응답성능을 갖는 극점, 영점 제어기를 설계한 후, 모의실험을 통해 속도제어응답을 확인할 수 있었고, 실시간프로그램으로 다운로드하여 실제 전동기 구동시스템의 실험을 통해서 설계된 속도제어기의 응답 결과를 모의실험과 비교하여 검증하였다.

• Journal of the Korean Institute of Intelligent Systems
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• v.21 no.1
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• pp.55-61
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• 2011

The small-sized wind turbine generating system with the output power less than 10kW, which can be installed in some areas of hills, parks, and cities due to its flexibility, is one of the progressive research and development fields in renewable energy. It is important for the small wind turbine generators to have low cost, high reliability as well as high efficiency. To meet these requirements, development of various maximum-power-point-tracking (MPPT) control schemes should be required. Generally, the output of the controller can be connected to a 48V battery to supply power to a DC load. In this work, the design and implementation of an FPGA-based MPPT controller for small-sized wind turbine generating system is presented. For the verification of the practical performance of various MPPT algorithms, CRIO controller from NI has been used.

• Advances in Energy Research
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• v.1 no.2
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• pp.97-106
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• 2013

This study designs and tests a photovoltaic system with distributed maximum power point tracking (DMPPT) methodology using a field programmable gate array (FPGA) controller. Each solar panel in the distributed PV system is equipped with a newly designed DC/DC converter and the panel's voltage output is regulated by a FPGA controller using PI control. Power from each solar panel on the system is optimized by another controller where the quadratic maximization MPPT algorithm is used to ensure the panel's output power is always maximized. Experiments are carried out at atmospheric insolation with partial shading conditions using 4 amorphous silicon thin film solar panels of 2 different grades fabricated by Chi-Mei Energy. It is found that distributed MPPT requires only 100ms to find the maximum power point of the system. Compared with the traditional centralized PV (CPV) system, the distributed PV (DPV) system harvests more than 4% of solar energy in atmospheric weather condition, and 22% in average under 19% partial shading of one solar panel in the system. Test results for a 1.84 kW rated system composed by 8 poly-Si PV panels using another DC/DC converter design also confirm that the proposed system can be easily implemented into a larger PV power system. Additionally, the use of NI sbRIO-9642 FPGA-based controller is capable of controlling over 16 sets of PV modules, and a number of controllers can cooperate via the network if needed.