• Title/Summary/Keyword: RFIC's

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The Double Balance Mixer Design with the Characteristics of Low Intermodulation Distortion, and Wide Dynamic Range with Low LO-power using InGaP/GaAs HBT Process (InGaP/GaAs HBT공정을 이용하여 낮은 LO파워로 동작하고 낮은 IMD와 광대역 특성을 갖는 이중평형 믹서설계)

  • S. H. Lee;S. S. Choi;J. Y. Lee;J. C. Lee;B. Lee;J. H. Kim;N. Y. Kim;Y. H. Lee;S. H. Jeon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.9
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    • pp.944-949
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    • 2003
  • In this paper, the double balance mixer(DBM) for Ku-band LNB using InGaP/GaAs HBT process is suggested for the characteristics of low DC power consumption, low noise figure, low intermodulation distortion and wide dynamic range. The 5 dB conversion gain, 14 dB NF, bandwidth 17.9 GHz and 50.34 dBc IMD are obtained under RF input power of -23 dBm, with bias condition as 3 V and 16 mA. The linearity of InGaP/GaAs HBT, the broad band input matching scheme and the optimization of bias point result in the low IMD, the broad bandwidth and the low power consumption characteristics.

A CMOS IR-UWB RFIC for Location Based Systems (위치 기반 시스템을 위한 CMOS IR-UWB RFIC)

  • Lee, Jung Moo;Park, Myung Chul;Eo, Yun Seong
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.12
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    • pp.67-73
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    • 2015
  • This paper presents a fully integrated 3 - 5 GHz IR-UWB(impulse radio ultra-wide band) RFIC for Location based system. The receiver architecture adopts the energy detection method and for high speed sampling, the equivalent time sampling technique using the integrated DLL(delay locked loop) and 4 bit ADC. The digitally synthesized UWB impulse generator with low power consumption is also designed. The designed IR-UWB RFIC is implemented on $0.18{\mu}m$ CMOS technology. The receiver's sensitivity is -85.7 dBm and the current consumption of receiver and transmitter is 32 mA and 25.5 mA respectively at 1.8 V supply.

Micromachined Millimeter-Wave Cavity Resonators

  • Song, K.J.;Yoon, B.S.;Lee, J.C.;Lee, B.;Kim, J.H.;Kim, N.Y.;Park, J.Y.;Kim, G.H.;Bu, J.U.;Chung, K.W.
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.1
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    • pp.27-36
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    • 2001
  • In this paper, micromachined millimeter-wave cavity resonators ar presented. One-port and two-port cavity resonators at Ka-band are designed using 3D design software, HP $HFSS^{TM}$ ver. 5.5 Cavity resonators are fabricated on Si substrate, which is etched down for the cavity, bonded with a Quartz wafer in which metal patterns for the feeding line coupling slot are formed. One-port resonator shows the resonant frequency of 39.34 GHz, the return loss of 14.5 dB, and the loaded $Q(Q_{L})$ of 150. Two-port cavity resonator shows the resonant frequency of 39 GHz, the insertion and return losses of 4.6dB and 19,9dB, the loaded($Q_{L}$) and unloaded $Q(Q_{U})$) of 44.3 and 107, respectively.

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Four-armed Dual-band Rectangular Patch Antenna Design

  • Maharjan, Ram Krishna;Shrestha, Bhanu;Ch, Zorigt;Kim, Nam-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.342-342
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    • 2010
  • This paper mainly focuses and describes four-armed dual-band rectangular type patch antenna using teflon of 0.54 mm thickness substrate for the application in personal wireless communications at about 2 GHz and 2.5 GHz frequency ranges. The dual-band patch antenna is obtained by embedding one centered and two pairs of rectangular patches on single body above the substrate. Details of the proposed antenna design are presented and discussed as a novel design with remarkable value of return loss (S11) of -28.68 dB and it is the most suitable for WiMAX applications as well.

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Massive MIMO with Transceiver Hardware Impairments: Performance Analysis and Phase Noise Error Minimization

  • Tebe, Parfait I.;Wen, Guangjun;Li, Jian;Huang, Yongjun;Ampoma, Affum E.;Gyasi, Kwame O.
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.13 no.5
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    • pp.2357-2380
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    • 2019
  • In this paper, we investigate the impact of hardware impairments (HWIs) on the performance of a downlink massive MIMO system. We consider a single-cell system with maximum ratio transmission (MRT) as precoding scheme, and with all the HWIs characteristics such as phase noise, distortion noise, and amplified thermal noise. Based on the system model, we derive closed-form expressions for a typical user data rate under two scenarios: when a common local oscillator (CLO) is used at the base station and when separated oscillators (SLOs) are used. We also derive closed-form expressions for the downlink transmit power required for some desired per-user data rate under each scenario. Compared to the conventional system with ideal transceiver hardware, our results show that impairments of hardware make a finite upper limit on the user's downlink channel capacity; and as the number of base station antennas grows large, it is only the hardware impairments at the users that mainly limit the capacity. Our results also show that SLOs configuration provides higher data rate than CLO at the price of higher power consumption. An approach to minimize the effect of the hardware impairments on the system performance is also proposed in the paper. In our approach, we show that by reducing the cell size, the effect of accumulated phase noise during channel estimation time is minimized and hence the user capacity is increased, and the downlink transmit power is decreased.

An Integrated Si BiCMOS RF Transceiver for 900 MHz GSM Digital Handset Application (I) : RF Receiver Section (900MHz GSM 디지털 단말기용 Si BiCMOS RF송수신 IC개발 (I) : RF수신단)

  • Park, In-Shig;Lee, Kyu-Bok;Kim, Jong-Kyu;Kim, Han-Sik
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.9
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    • pp.9-18
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    • 1998
  • A single RF transceiver chip for an extended GSM handset application was designedm, fabricated and evaluated. A RFIC was fabricated by using silicon BiCMOS process, and then packaged in 80 pin TQFP of $10 {\times} 10 mm^{2}$ in size. As a result, it was achieved guite reasonable integraty and good RF performance at the operation voltage of 3.3V. This paper describes development results of RF receiver section of the RFIC, which includes LNA, down conversion mixer, AGC, switched capacitor filter and down sampling mixer. The test results show that RF receiver section is well operated within frequency range of 925 ~960 MHz, which is defined on the extended GSM specification (E-GSM). The receiver section also reveals moderate power consumption of 67 mA and minimum detectable signal of -105 dBm.

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Implementation of High-Q Bondwire Inductors on Silicon RFIC (RFIC를 위한 실리콘 기판에서의 고품질 본드와이어 인덕터 구현)

  • 최근영;송병욱;김성진;이해영
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.12
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    • pp.559-565
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    • 2002
  • Today, because a quality factor of the inductor fabricated on silicon substrate for RFIC is under 12, the realization of inductor haying high-Q is essential. In this paper, two inductors having improved Q-factor are proposed and fabricated using a bondwire on silicon substrate. Also for the PGS is applied to the same inductors, four inductors are fabricated finally The bondwire Inductors have the relatively low conductor loss due to wide cross-section area and they can reduce the parastic capacitance very much because they are located in the air. Simulation and measurement results show that the proposed inductors have much more improved Q-factor, 15, than a conventional spiral inductor at 1.5 GHz. Because of the use of an automatic bonding machine, we can fabricate the high - Q inductors very easily, repeatedly.

SOP Package Modeling for RFIC (SOP RFIC 패키지 모델링)

  • 이동훈;어영선
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.11
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    • pp.18-28
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    • 1999
  • A new equivalent circuit model of package (SOP, Small Outline Package) is presented for designing radio frequency integrated circuits (RFIC). In the RF region, the paddle of a package does not work as an ideal ground. Further parasitics due to both coupling and loss have a substantial effect on MMIC. The equivalent circuit model and parameter extraction methodology for the electrical characteristics of the package are described by illustrating the SOP type packages. The accuracy of the model is evaluated by comparing the s-parameters of the commercial full-wave solver and those of HSPICE simulation with the circuit model. The proposed model shows an excellent agreement with full-wave analysis up to about 8GHz.

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Broadband CMOS Single-ended to Differential Converter for DVB-S2 Receiver Tuner IC (DVB-S2 수신기 튜너용 IC의 광대역 CMOS 단일신호-차동신호 변환기)

  • Shin, Hwa-Hyeong;Kim, Nam-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.185-185
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    • 2008
  • This paper describes the broadband SDC (Single-ended to Differential Converter) for Digital Video Broadcasting-Satellite $2^{nd}$ edition (DVB-S2) receiver tuner IC. It is fabricated by using $0.18{\mu}m$ CMOS process. In order to obtain high linearity and low phase mismatch, the broadband SDC (Single-ended to Differential Converter) is designed with current mirror structure and cross-coupled capacitor and current source binding differential structure at VDD. The simulation result of SDC shows IIP3 of 11.9 dBm and IIP2 of 38 dBm. It consumes 5mA current with 2.7V supply voltage.

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A Study on the Design and Implementation of the Oscillator Using a Miniaturized Hairpin Ring Resonator (소형화된 헤어핀 링 공진기를 이용한 발진기 설계 및 제작에 관한 연구)

  • Kim, Jang-Gu;Choi, Byoung-Ha
    • Journal of Advanced Navigation Technology
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    • v.12 no.2
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    • pp.122-131
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    • 2008
  • In this paper, an S-band oscillator of the low phase noise property using miniaturized microstrip hairpin shaped ring resonator has been designed and implemented. The TACONIC's RF-35 substrate has a dielectric constant ${\varepsilon}_r$=3.5 a thickness h=20mil a copper thickness t=17 um and loss tangent $tan{\delta}$=0.0025. The designed and implemented 2.45 GHz oscillator shows low phase performance of -100.5 dBc/Hz a 100kHz offset. Output power 20.9 dBm at center frequency 2.45 GHz and harmonic suppression -32 dBc. The circuit was implemented with hybrid technique. But can be fully compatible with the RFIC's, MIC and MMIC due to its entirely planar structure.

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